SEMICONDUCTOR ENERGY LABORATORY CO., LTD. patent applications on April 17th, 2025
Patent Applications by SEMICONDUCTOR ENERGY LABORATORY CO., LTD. on April 17th, 2025
SEMICONDUCTOR ENERGY LABORATORY CO., LTD.: 17 patent applications
SEMICONDUCTOR ENERGY LABORATORY CO., LTD. has applied for patents in the areas of H10D30/67 (4), H10D86/60 (4), H10D86/40 (4), H10B12/00 (3), H10K50/11 (3) H10K59/131 (2), G09G3/3677 (2), C07D307/91 (1), G02B27/0093 (1), G09G3/3648 (1)
With keywords such as: layer, electrode, third, material, provided, conductive, transistor, device, insulator, and conductor in patent application abstracts.
Patent Applications by SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor(s): Masanori TAKEDA of Atsugi JP for semiconductor energy laboratory co., ltd., Kazuki KAJIYAMA of Hadano JP for semiconductor energy laboratory co., ltd., Sachiko KAWAKAMI of Atsugi JP for semiconductor energy laboratory co., ltd., Naoaki HASHIMOTO of Sagamihara JP for semiconductor energy laboratory co., ltd., Tsunenori SUZUKI of Yokohama JP for semiconductor energy laboratory co., ltd.
IPC Code(s): C07D307/91, C07C211/61, C07D333/76, C07D335/02, H10K50/11, H10K59/35
CPC Code(s): C07D307/91
Abstract: an organic compound that can provide a light-emitting device having a high hole-transport property and high reliability. an organic compound represented by general formula (g1) shown below is provided. in general formula (g1), x represents a sulfur atom or an oxygen atom, each of rto rindependently represents any one of hydrogen, halogen, a nitrile group, an alkenyl group, a vinyl group, an alkynyl group, a straight-chain alkyl group having 1 to 6 carbon atoms, a cycloalkyl group having 3 to 10 carbon atoms, an alkoxy group having 1 to 6 carbon atoms, an alkylsilyl group having 3 to 12 carbon atoms, an aryl group having 6 to 30 carbon atoms, and a heteroaryl group having 2 to 30 carbon atoms. at least one of rto rrepresents a naphthyl group, n represents an integer of 0 to 4, and arrepresents a fluorenyl group or a spirofluorenyl group.
Inventor(s): Masanori TAKEDA of Atsugi JP for semiconductor energy laboratory co., ltd., Kazuki KAJIYAMA of Hadano JP for semiconductor energy laboratory co., ltd., Sachiko KAWAKAMI of Atsugi JP for semiconductor energy laboratory co., ltd., Naoaki HASHIMOTO of Sagamihara JP for semiconductor energy laboratory co., ltd., Tsunenori SUZUKI of Yokohama JP for semiconductor energy laboratory co., ltd.
IPC Code(s): C07D307/91, C07C211/61, C07D333/76, C07D335/02, H10K50/11, H10K59/35
CPC Code(s): C07D307/91
Abstract:
20250123483. ELECTRONIC DEVICE_simplified_abstract_(semiconductor energy laboratory co., ltd.)
Inventor(s): Shunpei YAMAZAKI of Tokyo JP for semiconductor energy laboratory co., ltd., Yosuke TSUKAMOTO of Atsugi JP for semiconductor energy laboratory co., ltd., Kiyoshi KATO of Atsugi JP for semiconductor energy laboratory co., ltd., Tatsuya ONUKI of Atsugi JP for semiconductor energy laboratory co., ltd., Yoshiaki OIKAWA of Atsugi JP for semiconductor energy laboratory co., ltd., Kensuke YOSHIZUMI of Atsugi JP for semiconductor energy laboratory co., ltd.
IPC Code(s): G02B27/00, G02B27/01
CPC Code(s): G02B27/0093
Abstract: provided is a multifunctional display device or a multifunctional electronic device. provided is a display device or electronic device with high visibility. provided is a display device or electronic device with low power consumption. the electronic device includes a housing, a display device, a system unit, a camera, a secondary battery, a reflective surface, and a wearing tool. the system unit and the secondary battery are each positioned inside the housing. the system unit includes a charging circuit unit. the charging circuit unit is configured to control charging of the secondary battery. the system unit is configured to perform first processing based on imaging data of the camera. the first processing includes at least one of gesture operation, head tracking, and eye tracking. the system unit is configured to generate image data based on the first processing. the display device is configured to display the image data.
20250124887. DISPLAY DEVICE_simplified_abstract_(semiconductor energy laboratory co., ltd.)
Inventor(s): Shunpei YAMAZAKI of Tokyo JP for semiconductor energy laboratory co., ltd.
IPC Code(s): G09G3/36, G02F1/1337, G02F1/1362, G02F1/1368, H10D30/67, H10D62/40, H10D86/40, H10D86/60, H10K50/12, H10K50/19, H10K59/32
CPC Code(s): G09G3/3648
Abstract: a display panel for displaying an image is provided with a plurality of pixels arranged in a matrix. each pixel includes one or more units each including a plurality of subunits. each subunit includes a transistor in which an oxide semiconductor layer which is provided so as to overlap a gate electrode with a gate insulating layer interposed therebetween, a pixel electrode which drives liquid crystal connected to a source or a drain of the transistor, a counter electrode which is provided so as to face the pixel electrode, and a liquid crystal layer provided between the pixel electrode and the counter electrode. in the display panel, a transistor whose off current is lower than 10 za/�m at room temperature per micrometer of the channel width and off current of the transistor at 85� c. can be lower than 100 za/�m per micrometer in the channel width.
Inventor(s): Hajime KIMURA of Atsugi JP for semiconductor energy laboratory co., ltd., Atsushi UMEZAKI of Atsugi JP for semiconductor energy laboratory co., ltd.
IPC Code(s): G09G3/36, G11C19/28
CPC Code(s): G09G3/3677
Abstract: it is an object to suppress deterioration of characteristics of a transistor in a driver circuit. a first switch for controlling whether to set a potential state of an output signal by being turned on and off in accordance with the first input signal, and a second switch for controlling whether to set a potential state of an output signal by being turned on and off in accordance with the second input signal are included. a first wiring and a second wiring are brought into electrical continuity by turning on and off of the first switch or the second switch.
20250124890. SEMICONDUCTOR DEVICE_simplified_abstract_(semiconductor energy laboratory co., ltd.)
Inventor(s): Atsushi UMEZAKI of Isehara JP for semiconductor energy laboratory co., ltd., Ryo ARASAWA of Isehara JP for semiconductor energy laboratory co., ltd.
IPC Code(s): G09G3/36, G09G3/3266, G09G3/34, G11C19/18, H10D1/68, H10D86/40, H10D86/60
CPC Code(s): G09G3/3677
Abstract: it is an object to provide a semiconductor device which can supply a signal with sufficient amplitude to a scan line while power consumption is kept small. further, it is an object to provide a semiconductor device which can suppress distortion of a signal supplied to the scan line and shorten a rising time and a falling time while power consumption is kept small. a semiconductor device which includes a plurality of pixels each including a display element and at least one first transistor and a scan line driver circuit supplying a signal for selecting the plurality of pixels to a scan line. a light-transmitting conductive layer is used for a pixel electrode layer of the display element, a gate electrode layer of the first transistor, source and drain electrode layers of the first transistor, and the scan line. the scan line driver circuit includes a second transistor and a capacitor for holding a voltage between a gate electrode layer of the second transistor and a source electrode layer of the second transistor. the source electrode of the second transistor is connected to the scan line.
20250124962. SEMICONDUCTOR DEVICE_simplified_abstract_(semiconductor energy laboratory co., ltd.)
Inventor(s): Shunpei YAMAZAKI of Tokyo JP for semiconductor energy laboratory co., ltd., Jun KOYAMA of Sagamihara JP for semiconductor energy laboratory co., ltd., Kiyoshi KATO of Sagamihara JP for semiconductor energy laboratory co., ltd.
IPC Code(s): G11C11/405, G11C16/04, H10B12/00, H10B41/20, H10B41/70, H10B69/00, H10D30/60, H10D30/67, H10D62/40, H10D62/80, H10D62/83, H10D84/03, H10D84/90, H10D86/40, H10D86/60, H10D87/00, H10D88/00
CPC Code(s): G11C11/405
Abstract: an object is to provide a semiconductor device with a novel structure. the semiconductor device includes a first wiring; a second wiring; a third wiring; a fourth wiring; a first transistor having a first gate electrode, a first source electrode, and a first drain electrode; and a second transistor having a second gate electrode, a second source electrode, and a second drain electrode. the first transistor is provided in a substrate including a semiconductor material. the second transistor includes an oxide semiconductor layer.
Inventor(s): Kazutaka KURIKI of Ebina JP for semiconductor energy laboratory co., ltd., Ryota TAJIMA of Isehara JP for semiconductor energy laboratory co., ltd., Yumiko YONEDA of Isehara JP for semiconductor energy laboratory co., ltd., Shunpei YAMAZAKI of Tokyo JP for semiconductor energy laboratory co., ltd.
IPC Code(s): H01M4/04, C23C14/04, C23C14/56, H01M10/0562, H01M10/0585
CPC Code(s): H01M4/0426
Abstract: an object is to achieve a manufacturing apparatus that can fully automate the manufacturing of a solid-state secondary battery. a mask alignment chamber, a first transfer chamber connected to the mask alignment chamber, a second transfer chamber connected to the first transfer chamber, a first film formation chamber connected to the second transfer chamber, a third transfer chamber connected to the first transfer chamber, and a second film formation chamber connected to the third transfer chamber are included. the first film formation chamber has a function of forming a positive electrode active material layer or a negative electrode active material layer by a sputtering method, the second film formation chamber has a function of forming a solid electrolyte layer by co-evaporation of an organic complex of lithium and siox (0<x≤2), and a substrate is transferred between the mask alignment chamber and the first film formation chamber and between the mask alignment chamber and the second film formation chamber without being exposed to the air.
Inventor(s): Teruaki OCHIAI of Atsugi, Kanagawa JP for semiconductor energy laboratory co., ltd., Kazutaka KURIKI of Ebina, Kanagawa JP for semiconductor energy laboratory co., ltd.
IPC Code(s): H01M4/525, H01M4/02, H01M4/04, H01M4/62
CPC Code(s): H01M4/525
Abstract: a positive electrode and a secondary battery that are stable in a high potential state and/or a high temperature state are provided. alternatively, a positive electrode and a secondary battery that have excellent cycle performance are provided. the positive electrode includes a positive electrode active material and a conductive material; at least part of a surface of the positive electrode active material is covered with the conductive material; the positive electrode active material includes lithium cobalt oxide containing magnesium, fluorine, aluminum, and nickel; the lithium cobalt oxide includes a region in which at least one or more concentrations of the magnesium, the fluorine, and the aluminum are the maximum in a surface portion; and the conductive material contains carbon. the conductive material is preferably one or more selected from carbon black, graphene, and a graphene compound.
Inventor(s): Shunpei YAMAZAKI of Setagaya JP for semiconductor energy laboratory co., ltd., Tatsuya ONUKI of Atsugi JP for semiconductor energy laboratory co., ltd., Kiyoshi KATO of Atsugi JP for semiconductor energy laboratory co., ltd., Hitoshi KUNITAKE of Machida JP for semiconductor energy laboratory co., ltd., Ryota HODO of Atsugi JP for semiconductor energy laboratory co., ltd.
IPC Code(s): H10B12/00
CPC Code(s): H10B12/482
Abstract: an electronic device including a first conductor, a second conductor, a first insulator, a second insulator, and a connection electrode is provided. the first insulator is provided over the first conductor and has a first opening overlapping with the first conductor. the second conductor is provided over the first insulator and has a second opening overlapping with the first conductor. the second insulator is provided over the second conductor and has a third opening overlapping with the first conductor. the second opening has a portion having a width smaller than a width of the third opening. the connection electrode is positioned inside the first opening, the second opening, and the third opening and is in contact with the top surface of the first conductor. the connection electrode includes a region in contact with part of the top surface and part of the side surface of the second conductor.
Inventor(s): Shunpei YAMAZAKI of Setagaya JP for semiconductor energy laboratory co., ltd., Hajime KIMURA of Atsugi JP for semiconductor energy laboratory co., ltd., Hitoshi KUNITAKE of Isehara JP for semiconductor energy laboratory co., ltd.
IPC Code(s): H10B43/27, H10B41/10, H10B41/27, H10B41/35, H10B41/40, H10B43/10, H10B43/35, H10B43/40
CPC Code(s): H10B43/27
Abstract: a semiconductor device with high storage capacity is provided. the semiconductor device includes first to sixth insulators, first to third conductors, and first to third material layers. the first conductor overlaps with a first insulator and a first material layer. a first region of the first material layer overlaps with a second material layer, a second conductor, a second insulator, and a third insulator. the third material layer is positioned in a region including a second region of the first material layer and top surfaces of the second material layer, the second conductor, the second insulator, and the third insulator; a fourth insulator is positioned over the third material layer; the sixth insulator is positioned over the fourth insulator; and a fifth insulator is positioned over the sixth insulator. the third conductor is positioned over the fifth insulator overlapping with the second region of the first material layer. the first to third material layers include oxide containing indium, an element m (m is aluminum, gallium, tin, or titanium), and zinc.
Inventor(s): Shunpei YAMAZAKI of Setagaya JP for semiconductor energy laboratory co., ltd., Tatsuya ONUKI of Atsugi JP for semiconductor energy laboratory co., ltd., Kiyoshi KATO of Atsugi JP for semiconductor energy laboratory co., ltd., Hitoshi KUNITAKE of Machida JP for semiconductor energy laboratory co., ltd., Ryota HODO of Atsugi JP for semiconductor energy laboratory co., ltd.
IPC Code(s): H10D30/67, H01L23/528, H10B12/00
CPC Code(s): H10D30/6755
Abstract: a semiconductor device that can be scaled down or highly integrated is provided. the semiconductor device includes a memory cell including first to third transistors and a capacitor. in each of the first to third transistors, the side surfaces of a metal oxide are covered with a source electrode and a drain electrode. the second and third transistors share the metal oxide. the capacitor is provided above the first to third transistors. a conductor including a region functioning as a write bit line is provided to include a region in contact with the top surface and the side surface of one of the source electrode and the drain electrode of the first transistor. a conductor including a region functioning as a read bit line is provided to include a region in contact with the top surface and the side surface of one of the source electrode and the drain electrode of the third transistor. the other of the source electrode and the drain electrode of the first transistor and a gate of the second transistor are electrically connected to one electrode of the capacitor.
Inventor(s): Yutaka OKAZAKI of Isehara JP for semiconductor energy laboratory co., ltd., Tomoaki MORIWAKA of Isehara JP for semiconductor energy laboratory co., ltd., Shinya SASAGAWA of Chigasaki Kanagawa JP for semiconductor energy laboratory co., ltd., Takashi OHTSUKI of Hadano JP for semiconductor energy laboratory co., ltd.
IPC Code(s): H10D86/60, H01L21/768, H01L23/532, H10D30/01, H10D30/67, H10D86/40, H10D99/00
CPC Code(s): H10D86/60
Abstract: to provide a miniaturized semiconductor device with low power consumption. a method for manufacturing a wiring layer includes the following steps: forming a second insulator over a first insulator; forming a third insulator over the second insulator; forming an opening in the third insulator so that it reaches the second insulator; forming a first conductor over the third insulator and in the opening; forming a second conductor over the first conductor; and after forming the second conductor, performing polishing treatment to remove portions of the first and second conductors above a top surface of the third insulator. an end of the first conductor is at a level lower than or equal to the top level of the opening. the top surface of the second conductor is at a level lower than or equal to that of the end of the first conductor.
20250126962. Light-Emitting Element_simplified_abstract_(semiconductor energy laboratory co., ltd.)
Inventor(s): Satoko SHITAGAKI of Isehara JP for semiconductor energy laboratory co., ltd., Satoshi SEO of Sagamihara JP for semiconductor energy laboratory co., ltd., Nobuharu OHSAWA of Zama JP for semiconductor energy laboratory co., ltd., Hideko INOUE of Atsugi JP for semiconductor energy laboratory co., ltd., Masahiro TAKAHASHI of Atsugi JP for semiconductor energy laboratory co., ltd., Kunihiko SUZUKI of Atsugi JP for semiconductor energy laboratory co., ltd.
IPC Code(s): H10K50/11, C09K11/02, C09K11/06, H05B33/14, H10K50/15, H10K50/16, H10K50/17, H10K50/818, H10K50/828, H10K85/30, H10K85/60, H10K101/00, H10K101/10
CPC Code(s): H10K50/11
Abstract: provided is a light-emitting element with high external quantum efficiency, or a light-emitting element with a long lifetime. the light-emitting element includes, between a pair of electrodes, a light-emitting layer including a guest material and a host material, in which an emission spectrum of the host material overlaps with an absorption spectrum of the guest material, and phosphorescence is emitted by conversion of an excitation energy of the host material into an excitation energy of the guest material. by using the overlap between the emission spectrum of the host material and the absorption spectrum of the guest material, the energy smoothly transfers from the host material to the guest material, so that the energy transfer efficiency of the light-emitting element is high. accordingly, a light-emitting element with high external quantum efficiency can be achieved.
20250126968. Light-Emitting Device_simplified_abstract_(semiconductor energy laboratory co., ltd.)
Inventor(s): Nobuharu OHSAWA of Zama JP for semiconductor energy laboratory co., ltd., Toshiki SASAKI of Kawasaki JP for semiconductor energy laboratory co., ltd., Shinya FUKUZAKI of Atsugi JP for semiconductor energy laboratory co., ltd., Hiromi SEO of Sagamihara JP for semiconductor energy laboratory co., ltd.
IPC Code(s): H10K50/17, H10K50/19, H10K85/60, H10K101/40
CPC Code(s): H10K50/171
Abstract: a light-emitting device with favorable characteristics is provided. in a plurality of light-emitting devices each including an organic compound layer formed over the same insulating surface, the organic compound layer includes a first light-emitting layer, a second light-emitting layer, and an intermediate layer. the intermediate layer includes a first layer. the first layer includes a metal or metal compound, a first organic compound, and a second organic compound. the first organic compound includes a �-electron deficient heteroaromatic ring. the second organic compound includes two or more heteroaromatic rings that are bonded or condensed to each other and include three or more heteroatoms in total. the second organic compound interacts with the metal or metal compound by two or more of the three or more heteroatoms as a multidentate ligand.
20250126977. DISPLAY APPARATUS_simplified_abstract_(semiconductor energy laboratory co., ltd.)
Inventor(s): Koji KUSUNOKI of Isehara, Kanagawa JP for semiconductor energy laboratory co., ltd., Daisuke KUBOTA of Atsugi, Kanagawa JP for semiconductor energy laboratory co., ltd., Kensuke YOSHIZUMI of Atsugi, Kanagawa JP for semiconductor energy laboratory co., ltd., Junpei SUGAO of Isehara, Kanagawa JP for semiconductor energy laboratory co., ltd.
IPC Code(s): H10K59/122
CPC Code(s): H10K59/122
Abstract: a display apparatus with a high aperture ratio is provided. the display apparatus includes a first pixel, a second pixel placed adjacent to the first pixel, a first conductive layer, a second conductive layer, and a first insulating layer. the first pixel includes a first pixel electrode, a first el layer over the first pixel electrode, and a common electrode over the first el layer. the second pixel includes a second pixel electrode, a second el layer over the second pixel electrode, and the common electrode over the second el layer. the first conductive layer is placed over the common electrode. the first insulating layer is placed over the first conductive layer. the second conductive layer is placed over the first insulating layer. one or both of the first conductive layer and the second conductive layer overlap with a region interposed between the first el layer and the second el layer. a side surface of the first el layer and a side surface of the second el layer are placed to face each other.
Inventor(s): Shinya SASAGAWA of Chigasaki, Kanagawa JP for semiconductor energy laboratory co., ltd., Ryota HODO of Atsugi, Kanagawa JP for semiconductor energy laboratory co., ltd., Kentaro SUGAYA of Isehara, Kanagawa JP for semiconductor energy laboratory co., ltd.
IPC Code(s): H10K59/131, H10K59/12, H10K59/122, H10K59/80
CPC Code(s): H10K59/131
Abstract: a highly reliable display device is provided. the display device includes a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, an insulating layer, a functional layer, and a light-emitting layer. the second conductive layer is provided over the first conductive layer and the third conductive layer is provided over the second conductive layer. a side surface of the second conductive layer is positioned on the inner side of side surfaces of the first and third conductive layers in a cross-sectional view. the insulating layer is provided to cover at least part of the side surface of the second conductive layer. the fourth conductive layer is provided to cover the first to third conductive layers and the insulating layer and to be electrically connected to the first to third conductive layers. the functional layer is provided to include a region in contact with the fourth conductive layer and the light-emitting layer is provided over the functional layer. the visible light reflectance of at least one of the first to third conductive layers is higher than the visible light reflectance of the fourth conductive layer.
Inventor(s): Shunpei YAMAZAKI of Tokyo JP for semiconductor energy laboratory co., ltd., Koji KUSUNOKI of Isehara JP for semiconductor energy laboratory co., ltd., Kazunori WATANABE of Tokyo JP for semiconductor energy laboratory co., ltd., Susumu KAWASHIMA of Atsugi JP for semiconductor energy laboratory co., ltd., Daisuke KUBOTA of Atsugi JP for semiconductor energy laboratory co., ltd., Taisuke KAMADA of Niiza JP for semiconductor energy laboratory co., ltd., Ryo HATSUMI of Hadano JP for semiconductor energy laboratory co., ltd.
IPC Code(s): H10K59/131, H10K50/11, H10K50/15, H10K50/16, H10K59/121, H10K77/10, H10K101/40
CPC Code(s): H10K59/131
Abstract: the resolution of a display apparatus having a light detection function is increased. a display apparatus includes a plurality of transistors and a light-emitting and light-receiving device in a subpixel. the light-emitting and light-receiving device has a function of emitting light of a first color and a function of receiving light of a second color. one of a source and a drain of a first transistor is electrically connected to a first wiring, and the other thereof is electrically connected to a gate of a second transistor. one electrode of the light-emitting and light-receiving device is electrically connected to one of a source and a drain of the second transistor, one of a source and a drain of a third transistor, and one of a source and a drain of a fifth transistor. one of a source and a drain of a fourth transistor is electrically connected to a second wiring, and the other thereof is electrically connected to the other of the source and the drain of the third transistor.
SEMICONDUCTOR ENERGY LABORATORY CO., LTD. patent applications on April 17th, 2025
- SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
- C07D307/91
- C07C211/61
- C07D333/76
- C07D335/02
- H10K50/11
- H10K59/35
- CPC C07D307/91
- Semiconductor energy laboratory co., ltd.
- G02B27/00
- G02B27/01
- CPC G02B27/0093
- G09G3/36
- G02F1/1337
- G02F1/1362
- G02F1/1368
- H10D30/67
- H10D62/40
- H10D86/40
- H10D86/60
- H10K50/12
- H10K50/19
- H10K59/32
- CPC G09G3/3648
- G11C19/28
- CPC G09G3/3677
- G09G3/3266
- G09G3/34
- G11C19/18
- H10D1/68
- G11C11/405
- G11C16/04
- H10B12/00
- H10B41/20
- H10B41/70
- H10B69/00
- H10D30/60
- H10D62/80
- H10D62/83
- H10D84/03
- H10D84/90
- H10D87/00
- H10D88/00
- CPC G11C11/405
- H01M4/04
- C23C14/04
- C23C14/56
- H01M10/0562
- H01M10/0585
- CPC H01M4/0426
- H01M4/525
- H01M4/02
- H01M4/62
- CPC H01M4/525
- CPC H10B12/482
- H10B43/27
- H10B41/10
- H10B41/27
- H10B41/35
- H10B41/40
- H10B43/10
- H10B43/35
- H10B43/40
- CPC H10B43/27
- H01L23/528
- CPC H10D30/6755
- H01L21/768
- H01L23/532
- H10D30/01
- H10D99/00
- CPC H10D86/60
- C09K11/02
- C09K11/06
- H05B33/14
- H10K50/15
- H10K50/16
- H10K50/17
- H10K50/818
- H10K50/828
- H10K85/30
- H10K85/60
- H10K101/00
- H10K101/10
- CPC H10K50/11
- H10K101/40
- CPC H10K50/171
- H10K59/122
- CPC H10K59/122
- H10K59/131
- H10K59/12
- H10K59/80
- CPC H10K59/131
- H10K59/121
- H10K77/10