Qualcomm incorporated (20250119563). STORING MISALIGNED REFERENCE PIXEL TILES
STORING MISALIGNED REFERENCE PIXEL TILES
Organization Name
Inventor(s)
Sriganesh Balakumar of San Jose CA US
Gaurav Avinash Patil of San Jose CA US
Rajesh Chowdary Chitturi of San Jose CA US
Prasanth Gomatam of San Diego CA US
Sravan Kumar Gopanapalle of Valley Center CA US
STORING MISALIGNED REFERENCE PIXEL TILES
This abstract first appeared for US patent application 20250119563 titled 'STORING MISALIGNED REFERENCE PIXEL TILES
Original Abstract Submitted
systems and techniques are provided for caching misaligned pixel tiles. a method includes determining a first codec region including a first region of a frame; determining whether pixels of a first version of a pixel tile were stored in a cache while coding blocks from a second codec region, the pixel tile corresponding to a location within the frame; based on whether the pixels were stored in the cache, determining whether to read the first version of the pixel tile from the cache or retrieve a second version of the pixel tile from a memory device, the second version of the pixel tile including pixels from the first codec region that are not in the first version of the pixel tile; and coding a block based on the first version of the pixel tile read from the cache or second version of the pixel tile retrieved from the memory device.
- Qualcomm incorporated
- Sriganesh Balakumar of San Jose CA US
- Kapil Garg of Fremont CA US
- Gaurav Avinash Patil of San Jose CA US
- Rajesh Chowdary Chitturi of San Jose CA US
- Prasanth Gomatam of San Diego CA US
- Sravan Kumar Gopanapalle of Valley Center CA US
- H04N19/423
- H04N19/105
- H04N19/167
- H04N19/176
- CPC H04N19/423