Qualcomm incorporated (20250086114). PERFORMANCE-BASED CACHE ADJUSTMENT
PERFORMANCE-BASED CACHE ADJUSTMENT
Organization Name
Inventor(s)
Karunakar Reddy Basireddy of SPSR Nellore (IN)
George Patsilaras of San Diego CA (US)
Vivekanandan Naveen of Bangalore (IN)
PERFORMANCE-BASED CACHE ADJUSTMENT
This abstract first appeared for US patent application 20250086114 titled 'PERFORMANCE-BASED CACHE ADJUSTMENT
Original Abstract Submitted
a device includes a system cache accessible to a central processing unit (cpu) sub-system. the system cache includes a cpu portion allocated to the cpu sub-system. the device also includes a cache allocation governor that is configured to obtain a performance metric associated with at least one of the system cache or the cpu sub-system. the cache allocation governor is also configured to, based on the performance metric satisfying a cache adjustment criterion, adjust a size of the cpu portion.