Qualcomm incorporated (20250062857). FAST CONVERGING LOW-DENSITY PARITY-CHECK TECHNIQUES
FAST CONVERGING LOW-DENSITY PARITY-CHECK TECHNIQUES
Organization Name
Inventor(s)
Pinar Sen of San Diego CA (US)
Jing Jiang of San Diego CA (US)
Gabi Sarkis of San Diego CA (US)
Thomas Joseph Richardson of South Orange NJ (US)
FAST CONVERGING LOW-DENSITY PARITY-CHECK TECHNIQUES
This abstract first appeared for US patent application 20250062857 titled 'FAST CONVERGING LOW-DENSITY PARITY-CHECK TECHNIQUES
Original Abstract Submitted
methods, systems, and devices for wireless communications are described. a transmitting device may perform a lifting procedure on a base graph including multiple variable nodes and multiple check nodes to obtain a lifted graph. the lifting procedure may include replacing each edge between multiple variable nodes and multiple check nodes of the base graph with a respective identity matrices with respective circular shift values. the base graph may include a punctured variable node which corresponds to each of one or more check nodes of the plurality of check nodes via multiple edges. the transmitting device may encode multiple information nodes and multiple parity nodes according to the lifted graph. the transmitting device may transmit a signal including multiple information bits and multiple parity bits based on encoding the multiple information nodes and the multiple parity nodes.