Patent Application 17520280 - METHODS FOR IMPLANTING SEMICONDUCTOR SUBSTRATES

Title: METHODS FOR IMPLANTING SEMICONDUCTOR SUBSTRATES
Application Information

Invention Title: METHODS FOR IMPLANTING SEMICONDUCTOR SUBSTRATES
Application Number: 17520280
Submission Date: 2025-05-22T00:00:00.000Z
Effective Filing Date: 2021-11-05T00:00:00.000Z
Filing Date: 2021-11-05T00:00:00.000Z
National Class: 438
National Sub-Class: 005000
Examiner Employee Number: 75479
Art Unit: 2855
Tech Center: 2800
Rejection Summary

102 Rejections: 0
103 Rejections: 1
Cited Patents

No patents were cited in this rejection.
Office Action Text


    DETAILED ACTION
Notice of Pre-AIA  or AIA  Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .

Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection.  Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114.  Applicant's submission filed on May 1, 2025 has been entered.
 
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.



Claims 1-2, 4, 8-9, 13-16 and 20-26 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent 6,677,594 (Young) in view of JP 2013-016745 (Yokogawa et al.).
With regards to claim 1, Young discloses a scanning wheel for ion implantation process chamber comprising, as illustrated in Figures 1-8, a method for implanting a semiconductor structure W (e.g. semiconductor wafer; column 4, lines 9-11; column 5, lines 1-8; Figure 7) with ions where the semiconductor structure W having a front surface (e.g. top surface) and rear surface (e.g. bottom surface) opposite the front surface comprising positioning the semiconductor structure W on a heatsink 4,7,15 (e.g. these elements form the heat sink; Figures 3,7) with the rear surface of the semiconductor structure contacting the heatsink (e.g. column 4, line 62 to column 5, line 8); implanting ions through the front surface of the semiconductor structure while the semiconductor structure is positioned on the heatsink to form a damage region in the semiconductor structure (e.g. column 4, lines 8-23; column 5,lines 1-7); the heatsink 4,7,15 being disposed on an ion implanter apparatus 1,2,3 (e.g. scan wheel; column 4, line 62 to column 5, line 8; Figures 1-2) during ion implantation such that the ion implanter apparatus rotating the heatsink during ion implantation (e.g. column 4, lines 9-24); removing the heatsink from the ion implanter apparatus and positioning the heatsink on a testing apparatus 25 (e.g. apparatus device with gripper arm connected to a control system of the machine) after ions are implanted through the front surface of the semiconductor structure (column 6, line 8 to column 7, line 6; Figures 5-6,8); measuring a slide-angle or break-away force of the heatsink on a surface while the heatsink is positioned on the testing apparatus (e.g. position strain gauge 33 measures sliding direction angle - column 6, lines 26-50 or height along with spin force  – column 6, line 57 to column 7, line 6; claim 14, last 3 lines).  (See, column 4, line 62 to column 7, line 17). 
The only difference between the prior art and the claimed invention is comparing the slide-angle or break-away force to a baseline range of the slide-angle or break-away force wherein (1) if the slide-angle or break-away force falls outside of the baseline range, the heatsink is reconditioned; and (2) if the slide-angle or break-away force falls within the baseline range, the heatsink is used during ion implantation of additional semiconductor structures.
Yokogawa et al. discloses an ion implantation system comprising, as illustrated in Figures 1-10, a method for implanting a semiconductor structure W (e.g. wafer substrate; paragraph [0028]) with ions where the semiconductor structure having a front surface (e.g. top surface) and rear surface (e.g. bottom surface) opposite the front surface comprising positioning the semiconductor structure on a heatsink 10,14 (e.g. main body of substrate holder 10 and rubber sheet member 14 form this heatsink; paragraph [0028]) with the rear surface of the semiconductor structure contacting the heatsink; implanting ions through the front surface of the semiconductor structure while the semiconductor structure is positioned on the heatsink to form a damage region in the semiconductor structure (e.g. paragraphs [0028] to [0030], [0012], [0040]); measuring a parameter of the heatsink (e.g. the wafer cooling efficiency varies depend on position of the wafer substrate on the heatsink 10,14 or the scratching between the wafer substrate W and the heatsink 10,14 or the temperature distribution can be considered as this parameter of the heatsink; paragraphs [0023],[0028], [0029]); comparing the parameter to a baseline range wherein (1) if the parameter falls outside of the baseline range, the heatsink is reconditioned (e.g. replacing the rubber sheet member of the heat sink; paragraphs [0045],[0048],[0054]); and (2) if the parameter falls within the baseline range, the heatsink is used during ion implantation of additional semiconductor structures (e.g. other substrate holders 16; paragraphs [0040],[0045]).  (See, paragraphs [0001] to [0066] of translation).
Although Kwon et al. does not explicitly disclose measuring the parameter is a slide-angle or break-away force of the heatsink as claimed; however, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have readily recognize the advantages and desirability to measure a slide-angle or break-away force of the heatsink as the parameters since a matter of choice possibilities to the operator what parameters to be measure without departing from the scope of the invention and to employ comparing the parameter to a baseline range wherein (1) if the parameter falls outside of the baseline range, the heatsink is reconditioned; and (2) if the parameter falls within the baseline range, the heatsink is used during ion implantation of additional semiconductor structures as suggested by Young to the system of Kwon et al. to have the ability to provide and produce SOI wafers under the same conditions without having to stop the operation of the ion implanter.  (See, paragraphs [0011],[0025],[0045] of Yokogawa et al.).
	With regards to claim 2, Young further discloses the heat sink 4 comprises a substrate (e.g. base of heat sink; column 5, lines 10-11) and an elastomeric coating 7 (e.g. elastomer layer; column 5, lines 1-2; Figures 3-4) disposed on at least one surface (e.g. top surface) of the substrate such that the elastomeric coating contacting the semiconductor structure W during ion implantation (e.g. column 5, lines 1-32; column 6, lines 57-66).
With regards to claim 4, Young further discloses the semiconductor structure is a layered structure (e.g. batch of wafers; column 1, lines 9-14).
With regards to claim 8, Yokogawa et al. further discloses the substrate (e.g. main body of substrate holder) is made of aluminum or stainless steel (e.g. metal plate; paragraph [0021]).
With regards to claim 9, Young further discloses the elastomeric coating is a silicone elastomer (e.g. column 3, lines 41-44).
With regards to claim 13, Young further discloses the heatsink 4 comprises a substrate(e.g. base of heat sink; column 5, lines 10-11) and an elastomeric coating 7 (e.g. elastomer layer; column 5, lines 1-2; Figures 3-4) disposed on the substrate such that the heatsink is reconditioned by stripping the elastomeric coating from the structure and depositing a second elastomeric coating on the substrate. (e.g. implicitly suggested due to the concept of cleaning or replacement elements/parts; column 3, line 54 to column 4, line 4).  At the same time, Yokogawa et al. further discloses reconditioned by stripping the elastomeric coating from the structure and depositing a second elastomeric coating on the substrate (e.g. replacing the rubber sheet member of the heat sink; paragraphs [0045],[0048],[0054]).
	With regards to claims 14-16 and 20, the claims are commensurate in scope with the above method claims 1,8,9,13 for measuring slide-angle and are rejected for the same reasons as set forth above.
	With regards to claims 21-24, the claims are commensurate in scope with the above method claims 1,8,9,13 for measuring break-away force and are rejected for the same reasons as set forth above.
	With regards to claim 25, the claim is commensurate in scope with the above method claim 1 for measuring slide-angle and are rejected for the same reasons as set forth above.
	With regards to claim 26, the claim is commensurate in scope with the above method claim 1 for measuring break-away force and are rejected for the same reasons as set forth above.

Response to Amendment
Applicant’s arguments with respect to claims 1-2,4,8-9,13-16,20-26 have been considered but are moot in view of the new ground(s) of rejection and/or because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.

Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Helen C Kwok whose telephone number is (571)272-2197. The examiner can normally be reached Monday to Friday, 7:30 to 4:00 EST.
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/HELEN C KWOK/Primary Examiner, Art Unit 2855