Patent Application 15764951 - SOLID-STATE IMAGE SENSOR AND ELECTRONIC DEVICE - Rejection
Appearance
Patent Application 15764951 - SOLID-STATE IMAGE SENSOR AND ELECTRONIC DEVICE
Title: SOLID-STATE IMAGE SENSOR, AND ELECTRONIC DEVICE
Application Information
- Invention Title: SOLID-STATE IMAGE SENSOR, AND ELECTRONIC DEVICE
- Application Number: 15764951
- Submission Date: 2025-04-10T00:00:00.000Z
- Effective Filing Date: 2018-03-30T00:00:00.000Z
- Filing Date: 2018-03-30T00:00:00.000Z
- National Class: 257
- National Sub-Class: 440000
- Examiner Employee Number: 92334
- Art Unit: 2811
- Tech Center: 2800
Rejection Summary
- 102 Rejections: 0
- 103 Rejections: 4
Cited Patents
No patents were cited in this rejection.
Office Action Text
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 30 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 30, line 3 recites “in a same depth (region)”. It is not clear, from this limitation what the meaning of “(region)” is. This issue renders the claim indefinite. For the purposes of this examination, the examiner will interpret the limitation as “in a same depth”. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-2, 6, 8-9, 12, 14-15, 19-20, 23 and 29-33 is/are rejected under 35 U.S.C. 103 as being unpatentable over SUGIURA (US 20150255498) in view of TSAI (US 20150179613). Regarding claim 1, SUGIURA discloses a light detecting device, comprising: a semiconductor substrate having a first side and a second side (Si layer 51 and 52 having a top side and a bottom side, see fig 4, para 62); a photoelectric conversion element (photoelectric conversion structure comprising 4, 40 and 41, see fig 4, para 44, 69 and 107); and a through electrode coupled to the photoelectric conversion element (conductive plug 6 coupled to 4, see fig 4, para 71), the through electrode including a conductive portion (fig 4, 60, para 71), and an insulating film (fig 4, 61, para 71), wherein the first side of the semiconductor substrate is disposed between the photoelectric conversion element and the second side of the semiconductor substrate (the top side of 51 is between the bottom side of 51 and 40, see fig 4), wherein a first portion of the insulating film s disposed above the first side of the semiconductor substrate (a portion of 61 is disposed above a top surface of 51, see fig 4) and a second portion of the insulating film is disposed in the semiconductor substrate (a portion of 61 is disposed inside 51, see fig 4), wherein the conductive portion of the through electrode is disposed in the semiconductor substrate (a portion of 60 is disposed inside 51, see fig 4). SUGIURA fails to explicitly disclose a device comprising a through electrode, the through electrode including a conductive portion, an insulating film, and a fixed charge film, wherein the insulating film is disposed above the fixed charge film in a cross-sectional view, wherein an incline of the second portion of the insulating film is different from an incline of a first portion of the conductive portion of the through electrode. TSAI teaches a device comprising a through electrode (the electrode structure going through substrate 102 comprising 620, 330a and 330b, see fig 6, para 12, 35 and 29), the through electrode including a conductive portion (fig 6, 620, para 35), an insulating film (insulating film 330b, see fig 6, para 29), and a fixed charge film (layer 330a which can be HfO2, see fig 6, para 29), wherein the insulating film is disposed above the fixed charge film in a cross-sectional view (330b is above 330a, see fig 6), wherein a first portion of the insulating film s disposed above the first side of the semiconductor substrate (a first portion of 330b can be defined which is above the substrate 102, see fig 6 and figure I below) and a second portion of the insulating film is disposed in the semiconductor substrate (a second portion of 330b can be defined which is inside the substrate 102, see fig 6 and figure I below), wherein an incline of the second portion of the insulating film is different from an incline of a first portion of the conductive portion of the through electrode (a portion of 620 in the substrate can be defined which is horizontally inclined, while the second portion of 330b can be defined as being vertically inclined, see fig 6 and figure I below). SUGIURA and TSAI are analogous art because they both are directed towards conductive vias for semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of SUGIURA with the specific via structure of TSAI because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of SUGIURA with the specific via structure of TSAI in order to provide greater passivation and isolation between through via structures and device circuits/pixel arrays (see TSAI para 28). Regarding claim 2, SUGIURA and TSAI disclose the light detecting device according to claim 1. SUGIURA further discloses a device, wherein the through electrode penetrates the semiconductor substrate and transfer an electric charge converted by the photoelectric conversion element to at least one of an amplifier transistor or a floating diffusion formed at the second side of the semiconductor substrate (60 can be connected to an amplifying transistor, see fig 8, para 120). Regarding claim 6, SUGIURA and TSAI disclose the light detecting device according to claim 1. SUGIURA further discloses a device, wherein the insulating film includes a dielectric having an insulation property (61 can be SiN, see para 100). Regarding claim 8, SUGIURA and TSAI disclose the light detecting device according to claim 1. SUGIURA further discloses a device, wherein a center portion of through electrode includes at least one of a metal or conductive material (60 can be a conductive material, see para 71). Regarding claim 9, SUGIURA and TSAI disclose the light detecting device according to claim 1. SUGIURA further discloses a device, wherein the through electrode comprises a plurality of through electrodes, and wherein each through electrode is formed for each pixel of a plurality of pixels (the pixel array 23 is provided with contact plugs to transfer charge, see para 71). Regarding claim 12, SUGIURA and TSAI disclose the light detecting device according to claim 1. SUGIURA further discloses a device, wherein a cross-sectional shape of the through electrode in a horizontal direction is a circle (6 can be circular from the top, see fig 11, para 71) or a rectangle. Regarding claim 14, SUGIURA discloses an electronic device comprising: a solid-state image sensor (the device is a solid-state imaging sensor, see para 19), the solid-state image sensor including: a semiconductor substrate having a first side and a second side (Si layer 51 and 52 having a top side and a bottom side, see fig 4, para 62); a photoelectric conversion element (photoelectric conversion structure comprising 4, 40 and 41, see fig 4, para 44, 69 and 107); and a through electrode coupled to the photoelectric conversion element (conductive plug 6 coupled to 4, see fig 4, para 71), the through electrode including a conductive portion (fig 4, 60, para 71), and an insulating film (fig 4, 61, para 71), wherein the first side of the semiconductor substrate is disposed between the photoelectric conversion element and the second side of the semiconductor substrate (the top side of 51 is between the bottom side of 51 and 40, see fig 4), wherein a first portion of the insulating film is disposed above the first side of the semiconductor substrate (a portion of 61 is disposed above a top surface of 51, see fig 4) and a second portion of the insulating film is disposed in the semiconductor substrate (a portion of 61 is disposed inside 51, see fig 4),wherein the conductive portion of the through electrode is disposed in the semiconductor substrate (conductor 60 is inside 51, see fig 4). SUGIURA fails to explicitly disclose a device comprising a through electrode, the through electrode including a conductive portion, an insulating film, and a fixed charge film, wherein the insulating film is disposed above the fixed charge film in a cross-sectional view, wherein an incline of the second portion of the insulating film is different from an incline of a first portion of the conductive portion of the through electrode. TSAI teaches a device a through electrode (the electrode structure going through substrate 102 comprising 620, 330a and 330b, see fig 6, para 12, 35 and 29), the through electrode including a conductive portion (fig 6, 620, para 35), an insulating film (insulating film 330b, see fig 6, para 29), and a fixed charge film (layer 330a which can be HfO2, see fig 6, para 29), wherein the insulating film is disposed above the fixed charge film in a cross-sectional view (330b is above 330a, see fig 6), wherein a first portion of the insulating film is disposed above the first side of the semiconductor substrate (a first portion of 330b can be defined which is above the substrate 102, see fig 6 and figure I below) and a second portion of the insulating film is disposed in the semiconductor substrate (a second portion of 330b can be defined which is inside the substrate 102, see fig 6 and figure I below),wherein the conductive portion of the through electrode is disposed in the semiconductor substrate (conductor 620 is inside substrate 102, see fig 6), and wherein an incline of the second portion of the insulating film is different from an incline of a first portion of the conductive portion of the through electrode (a portion of 620 in the substrate can be defined which is horizontally inclined, while the second portion of 330b can be defined as being vertically inclined, see fig 6 and figure I below). SUGIURA and TSAI are analogous art because they both are directed towards conductive vias for semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of SUGIURA with the specific via structure of TSAI because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of SUGIURA with the specific via structure of TSAI in order to provide greater passivation and isolation between through via structures and device circuits/pixel arrays (see TSAI para 28). Regarding claim 15, SUGIURA discloses an imaging device, comprising: a semiconductor substrate having a first side and a second side (Si layer 51 and 52 having a top side and a bottom side, see fig 4, para 62); a photoelectric conversion element (photoelectric conversion structure comprising 4, 40 and 41, see fig 4, para 44, 69 and 107); and a plurality of through electrodes directly coupled to the photoelectric conversion element (conductive plugs 6 coupled to 4, see fig 4, para 71),, each through electrode of the plurality of through electrodes including a conductive portion (fig 4, 60, para 71), and an insulating film (fig 4, 61, para 71), wherein the first side of the semiconductor substrate is disposed between the photoelectric conversion element and the second side of the semiconductor substrate (the top side of 51 is between the bottom side of 51 and 40, see fig 4), wherein a first portion of the insulating film disposed above the first side of the semiconductor substrate (a portion of 61 is disposed above a top surface of 51, see fig 4) and a second portion of the insulating film is disposed in the semiconductor substrate (a portion of 61 is disposed inside 51, see fig 4), wherein the conductive portion of the through electrode is disposed in the semiconductor substrate (a portion of 60 is disposed inside 51, see fig 4). SUGIURA fails to explicitly disclose a device comprising a through electrode including a conductive portion, an insulating film, and a fixed charge film, wherein the insulating film is disposed above the fixed charge film in a cross-sectional view, wherein an incline of the second portion of the insulating film is different from in an incline of a first portion of the conductive portion of each through electrode. TSAI teaches a device comprising a through electrode (the electrode structure going through substrate 102 comprising 620, 330a and 330b, see fig 6, para 12, 35 and 29) including a conductive portion (fig 6, 620, para 35), an insulating film (insulating film 330b, see fig 6, para 29), and a fixed charge film (layer 330a which can be HfO2, see fig 6, para 29), wherein the insulating film is disposed above the fixed charge film in a cross-sectional view (330b is above 330a, see fig 6), wherein a first portion of the insulating film disposed above the first side of the semiconductor substrate (a first portion of 330b can be defined which is above the substrate 102, see fig 6 and figure I below) and a second portion of the insulating film is disposed in the semiconductor substrate (a second portion of 330b can be defined which is inside the substrate 102, see fig 6 and figure I below), wherein an incline of the second portion of the insulating film is different from in an incline of a first portion of the conductive portion of each through electrode (a portion of 620 in the substrate can be defined which is horizontally inclined, while the second portion of 330b can be defined as being vertically inclined, see fig 6 and figure I below). SUGIURA and TSAI are analogous art because they both are directed towards conductive vias for semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of SUGIURA with the specific via structure of TSAI because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of SUGIURA with the specific via structure of TSAI in order to provide greater passivation and isolation between through via structures and device circuits/pixel arrays (see TSAI para 28). Regarding claim 19, SUGIURA and TSAI disclose the electronic device according to claim 14. SUGIURA further discloses a device, wherein the through electrode penetrates the semiconductor substrate and transfer an electric charge converted by the photoelectric conversion element to at least one of an amplifier transistor or a floating diffusion formed at the second side of the semiconductor substrate (60 can be connected to an amplifying transistor, see fig 8, para 120). Regarding claim 20, SUGIURA and TSAI disclose the electronic device according to claim 14. SUGIURA further discloses a device, wherein the insulating film includes a dielectric having an insulation property (61 can be SiN, see fig 4, para 100), and wherein a center portion of the through electrode includes at least one of a metal or conductive material (60 can be W, see para 101). Regarding claim 23, SUGIURA and TSAI disclose the electronic device according to claim 14. SUGIURA further discloses a device, wherein a cross-sectional shape of the through electrode in a horizontal direction is a circle (6 can be circular from the top, see fig 11) or a rectangle. Regarding claim 29, SUGIURA and TSAI disclose the light detecting device according to claim 1. SUGIURA fails to explicitly disclose a device, wherein the insulating film is disposed directly above the fixed charge film in the cross-sectional view. TSAI teaches a device, wherein the insulating film is disposed directly above the fixed charge film in the cross-sectional view (330b is directly on a top surface of 330a, see fig 6). SUGIURA and TSAI are analogous art because they both are directed towards conductive vias for semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of SUGIURA with the specific via structure of TSAI because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of SUGIURA with the specific via structure of TSAI in order to provide greater passivation and isolation between through via structures and device circuits/pixel arrays (see TSAI para 28). Regarding claim 30, SUGIURA and TSAI disclose the light detecting device according to claim 1. SUGIURA fails to explicitly disclose a device, wherein the second portion of the insulating film and the first portion of the conductive portion are disposed in a same depth (region). TSAI teaches a device, wherein the second portion of the insulating film and the first portion of the conductive portion are disposed in a same depth (region) (the second portion of the insulating film and the first portion of the conductive portion share a depth into substrate 102, see fig 6 and figure I below). SUGIURA and TSAI are analogous art because they both are directed towards conductive vias for semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of SUGIURA with the specific via structure of TSAI because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of SUGIURA with the specific via structure of TSAI in order to provide greater passivation and isolation between through via structures and device circuits/pixel arrays (see TSAI para 28). Regarding claim 31, SUGIURA and TSAI disclose the light detecting device according to claim 1. SUGIURA further discloses a device, wherein the through electrode is connected to a plurality of pixels (the contact plugs 6 are connected to a pixel array 23, see para 71). Regarding claim 32, SUGIURA and TSAI disclose the light detecting device according to claim 1. SUGIURA further discloses a device, wherein the through electrode comprises a plurality of through electrodes, and wherein each through electrode is formed for each pixel of a plurality of pixels (the contact plugs 6 are connected to a pixel array 23, see para 71). Regarding claim 33, SUGIURA and TSAI disclose the light detecting device according to claim 1. SUGIURA further discloses a device, wherein a plurality of through electrodes includes the through electrode coupled to the photoelectric conversion element (the pixel array 23 is provided with contact plugs 6, see fig 4, para 71). PNG media_image1.png 692 658 media_image1.png Greyscale Figure I: TSAI figure 6 with added annotations. Claim(s) 13 and 24 is/are rejected under 35 U.S.C. 103 as being unpatentable over SUGIURA (US 20150255498) in view of TSAI (US 20150179613) further in view of MIZUNO (US 20170077431). Regarding claim 13 SUGIURA and TSAI disclose the light detecting device according to claim 2. SUGIURA fails to explicitly disclose a device, further comprising: a first photoelectric conversion layer formed in the semiconductor substrate and sensitive to light of a wavelength that differs from a wavelength of light to which the photoelectric conversion element is sensitive; and a second photoelectric conversion layer formed in the semiconductor substrate and sensitive to light of a wavelength that differs from wavelengths of light to which the photoelectric conversion element and the first photoelectric conversion layer are sensitive. MIZUNO teaches a device, further comprising: a first photoelectric conversion layer formed in the semiconductor substrate and sensitive to light of a wavelength that differs from a wavelength of light to which the photoelectric conversion element is sensitive (43 and 44 are filters for different color, so the photodiodes 61 and 62 are sensitive to different colors, see fig 1, para 154 and 159); and a second photoelectric conversion layer formed in the semiconductor substrate and sensitive to light of a wavelength that differs from wavelengths of light to which the photoelectric conversion element and the first photoelectric conversion layer are sensitive (the left photoelectric layers 34 over 44, see fig 2). SUGURA and MIZUNO are analogous art because they both are directed towards semiconductor photoelectric devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of SUGURA with the multiple photoelectric conversion elements with different wavelengths of MIZUNO because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of SUGURA with the multiple photoelectric conversion elements with different wavelengths of MIZUNO in order to improve the photoelectric conversion efficiency (see MIZUNO para 68). Regarding claim 24 SUGIURA and TSAI disclose the electronic device according to claim 14. SUGIURA fails to explicitly disclose a device, further comprising: a first photoelectric conversion layer formed in the semiconductor substrate and sensitive to light of a wavelength that differs from a wavelength of light to which the photoelectric conversion element is sensitive; and a second photoelectric conversion layer formed in the semiconductor substrate and sensitive to light of a wavelength that differs from wavelengths of light to which the photoelectric conversion element and the first photoelectric conversion layer are sensitive. MIZUNO teaches a device, further comprising: a first photoelectric conversion layer formed in the semiconductor substrate and sensitive to light of a wavelength that differs from a wavelength of light to which the photoelectric conversion element is sensitive (43 and 44 are filters for different color, so the photodiodes 61 and 62 are sensitive to different colors, see fig 1, para 154 and 159); and a second photoelectric conversion layer formed in the semiconductor substrate and sensitive to light of a wavelength that differs from wavelengths of light to which the photoelectric conversion element and the first photoelectric conversion layer are sensitive (the left photoelectric layers 34 over 44, see fig 2). SUGURA and MIZUNO are analogous art because they both are directed towards semiconductor photoelectric devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of SUGURA with the multiple photoelectric conversion elements with different wavelengths of MIZUNO because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of SUGURA with the multiple photoelectric conversion elements with different wavelengths of MIZUNO in order to improve the photoelectric conversion efficiency (see MIZUNO para 68). Claim(s) 34 is/are rejected under 35 U.S.C. 103 as being unpatentable over SUGIURA (US 20150255498) in view of TSAI (US 20150179613) further in view of KOKUBUN (US 20110272772). Regarding claim 34 SUGIURA and TSAI disclose the light detecting device according to claim 1. SUGIURA fails to explicitly disclose a device, wherein the conductive portion of the through electrode is a constant diameter. KOKUBUN teaches a device, wherein the conductive portion of the through electrode is a constant diameter (the conductive part of the contact plug 82gk is constant, see fig 5, para 84). SUGURA and KOKUBUN are analogous art because they both are directed towards semiconductor photoelectric devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of SUGURA with the conductive portion diameter of KOKUBUN because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of SUGURA with the conductive portion diameter of KOKUBUN in order to reduce the dimension of contact holes passing through the laminate structures (see KOKUBUN para 85). Claim(s) 35 is/are rejected under 35 U.S.C. 103 as being unpatentable over SUGIURA (US 20150255498) in view of TSAI (US 20150179613) further in view of CHEN (US 20130277789). Regarding claim 35 SUGIURA and TSAI disclose the light detecting device according to claim 1. SUGIURA fails to explicitly disclose a device, wherein the second portion of the insulating film is a tapered shape in the cross-sectional view. CHEN teaches a device, wherein the second portion of the insulating film is a tapered shape in the cross-sectional view (the oxide 42 has a tapering width, see fig 12, para 32). SUGURA and CHEN are analogous art because they both are directed towards semiconductor photoelectric devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of SUGURA with the insulator shape of CHEN because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of SUGURA with the insulator shape of CHEN in order to avoid thermal stress on the device (see CHEN para 39). Response to Arguments Applicant's arguments filed 12/24/2024 have been fully considered but they are not persuasive. Regarding claims 1, 14 and 15, the applicant argues that neither KOKUBUN nor TSAI discloses a device “wherein a first portion of the insulating film is disposed on the first side of the semiconductor substrate and a second portion of the insulating film is disposed in the semiconductor substrate, wherein the conductive portion of the through electrode is disposed in the semiconductor substrate, and wherein an incline of the second portion of the insulating film is different from an incline of a first portion of the conductive portion of the through electrode”. This argument is unpersuasive because TSAI, in figure 6, a device with an insulating layer 330b that has a portion inside the semiconductor substrate 102 and another portion above that substrate, and also the portion of in the insulating layer 330b is vertically inclined and a portion of the conductor 620 in the substrate can be defined that is horizontally inclined (see figure I above) which thus have different inclinations. The applicant also argues that TSAI does not disclose every element of the claimed invention because TSAI does not disclose a device which gradually tapers in a depth direction. This argument is unpersuasive because no such limitation is present in the claims. For at least these reasons, and those given in the rejection above, SUGIURA and TSAI disclose every element of claims 1, 14 and 15 . Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JONAS TYLER BEARDSLEY whose telephone number is (571)272-3227. The examiner can normally be reached 930-600 M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached on 571-272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JONAS T BEARDSLEY/Examiner, Art Unit 2811 /SAMUEL A GEBREMARIAM/Primary Examiner, Art Unit 2811