FAULT DETECTION IN PARALLEL HARDWARE

Organization Name

nvidia corporation

Inventor(s)

Saurabh Hukerikar of Santa Clara CA (US)

Nirmal Saxena of Los Altos Hills CA (US)

Atieh Lotfi of San Jose CA (US)

Samuel H. Duncan of Arlington MA (US)

Yanxiang Huang of San Jose CA (US)

Jason Campbell of Lake Elmo MN (US)

Paul Racunas of Landaff NH (US)

FAULT DETECTION IN PARALLEL HARDWARE

This abstract first appeared for US patent application 20240402250 titled 'FAULT DETECTION IN PARALLEL HARDWARE

Original Abstract Submitted

in various examples, faults are detected based at least in part on result value(s) generated by hardware component(s) by performing one or more diagnostic tests in accordance with a diagnostic test pattern. the diagnostic test pattern may be used to perform an assessment of functionality of the hardware component(s) by causing the hardware component(s) to generate the result value(s), which may be used to identify one or more hardware faults (e.g., by comparing the result value(s) to expected value(s)).