NVIDIA Corporation patent applications on May 1st, 2025
Patent Applications by NVIDIA Corporation on May 1st, 2025
NVIDIA Corporation: 30 patent applications
NVIDIA Corporation has applied for patents in the areas of G06V20/56 (6), G06V10/82 (6), G06V10/764 (5), G06N3/045 (4), G06N3/08 (4) H04N23/667 (2), G05D1/0221 (2), G06F11/1464 (2), G06N3/084 (1), H04N21/234363 (1)
With keywords such as: data, vehicle, image, processing, input, used, based, various, examples, and application in patent application abstracts.
Patent Applications by NVIDIA Corporation
Inventor(s): Amit Parikh of Santa Clara CA US for nvidia corporation, Ganapathy Raman Kasi of Fremont CA US for nvidia corporation, Timothy Andrew Prinz of Seattle WA US for nvidia corporation
IPC Code(s): A63F13/355
CPC Code(s): A63F13/355
Abstract: in various examples, processing content data using parallel processing units for content streaming systems and applications is described herein. systems and methods are disclosed that determine when to offload at least a portion of the processing that is typically performed by a central processing unit (cpu) to a parallel processing unit (ppu). for example, and for an application, a profile may be generated that includes information associated the application, such as one or more processing metrics associated with the application and/or which processes, if any, should be offloaded. in some examples, the profile may be generated using processing statistics associated with one or more previous streaming sessions associated with the application. the systems and methods may then use the profile and/or other data to determine whether to offload one or more processes from the cpu to the ppu (and/or, in some examples, from the ppu to the cpu).
Inventor(s): Rajath SHETTY of Sunnyvale CA US for nvidia corporation, Ratin KUMAR of Cupertino CA US for nvidia corporation, Niral Lalit PATHAK of Santa Clara CA US for nvidia corporation, Niranjan AVADHANAM of Saratoga CA US for nvidia corporation
IPC Code(s): B60W50/10, B60W60/00, G06V20/58, G06V20/59, G06V20/62, G06V30/14, G06V30/19, G06V30/262, G10L15/183
CPC Code(s): B60W50/10
Abstract: various embodiments of the present disclosure relate to operator assistance based on extracting natural language characters from one or more sensed objects. for instance, particular embodiments may generate a natural language utterance based on extracting natural language text in a nearby traffic sign. in an illustrative example, particular embodiments may detect, via object detection and within image data, one or more regions of the image data depicting the traffic sign. particular embodiments can then extract one or more first natural language characters represented in the traffic sign based at least on performing optical character recognition within the one or more regions of the image data in response to detecting the one or more regions of the image data depicting the traffic sign.
Inventor(s): Rajath SHETTY of Sunnyvale CA US for nvidia corporation, Ratin KUMAR of Cupertino CA US for nvidia corporation, Niral Lalit PATHAK of Santa Clara CA US for nvidia corporation, Niranjan AVADHANAM of Saratoga CA US for nvidia corporation
IPC Code(s): B60W50/14, G06V20/59, G10L13/027, G10L15/22
CPC Code(s): B60W50/14
Abstract: various embodiments of the present disclosure relate to operator assistance based on operator monitoring. for instance, during long drives, a driver may become drowsy or may not otherwise be alert. as such, particular embodiments have the capability of starting a conversation with the driver based on driver interests and/or detecting that the driver is getting drowsy. in an illustrative example, a driver monitoring system (dms) camera of a vehicle may employ a component that derives pixel-level information showing head nodding, hands dropping, or the like. based on image pattern characteristics in the image data, particular embodiments generate a score representing an alertness level. a representation of the alertness level can be provided as input to a machine learning model so that the model may generate a suitable natural language or other response, such as starting a conversation with personalized trivia, sending a control signal to honk a horn, or the like.
Inventor(s): Padmanabham Patki of Fremont CA US for nvidia corporation, Jue Wu of Los Gatos CA US for nvidia corporation, Andrew Elias of Ottawa CA for nvidia corporation, Smbat Tonoyan of Los Gatos CA US for nvidia corporation
IPC Code(s): E01F13/02, G09F9/30
CPC Code(s): E01F13/028
Abstract: systems, computer program products, and methods are described herein for automated data retrieval from an integrated circuit (ic). an example system extracts, using a scan island (e.g., a partition of the ic that is isolated for data retrieval), data from a plurality of scan chains and a plurality of random-access memories (rams) associated with the ic in response to a trigger event associated with the ic; determines, using a data security module associated with the scan island, whether the one or more users are authorized to access the respective portions of the data; and transmits the one or more portions of the data to the one or more users upon verification of their authorization.
Inventor(s): Yu SHENG of San Deigo CA US for nvidia corporation, Amir AKBARZADEH of Alamo CA US for nvidia corporation, Vishisht GUPTA of Santa Clara CA US for nvidia corporation, Jordan MARR of Campbell CA US for nvidia corporation, Shaun LIU of San Jose CA US for nvidia corporation
IPC Code(s): G01C21/00, G01C21/34, G06T7/536, G06T7/73, G06V20/56
CPC Code(s): G01C21/3848
Abstract: embodiments of the present disclosure relate to a system and method used to localize one or more systems using 2d map data. the method may include determining an image location of a representation of a portion of an object in an image corresponding to an environment. in some embodiments, the method may additionally include determining one or more predicted image locations corresponding to the image location of the representation of the portion of the object. the method may additionally include comparing one or more ground plane locations of the portion of the object with the one or more predicted image locations, and determining a cost based at least on the comparison between the one or more ground plane locations and the one or more predicted image locations. further, the method may include localizing a system to the 2d map data based on the determined cost.
Inventor(s): Minwoo Park of Saratoga WA US for nvidia corporation, Xiaolin Lin of Sunnyvale CA US for nvidia corporation, Hae-Jong Seo of San Jose CA US for nvidia corporation, David Nister of Bellevue WA US for nvidia corporation, Neda Cvijetic of East Palo Alto CA US for nvidia corporation
IPC Code(s): G05D1/00, G05D1/228, G06F18/214, G06F18/23, G06F18/2411, G06N3/04, G06V10/44, G06V10/48, G06V10/75, G06V10/764, G06V10/776, G06V10/82, G06V10/94, G06V20/56
CPC Code(s): G05D1/0077
Abstract: in various examples, systems and methods are disclosed that preserve rich spatial information from an input resolution of a machine learning model to regress on lines in an input image. the machine learning model may be trained to predict, in deployment, distances for each pixel of the input image at an input resolution to a line pixel determined to correspond to a line in the input image. the machine learning model may further be trained to predict angles and label classes of the line. an embedding algorithm may be used to train the machine learning model to predict clusters of line pixels that each correspond to a respective line in the input image. in deployment, the predictions of the machine learning model may be used as an aid for understanding the surrounding environmentâe.g., for updating a world modelâin a variety of autonomous machine applications.
Inventor(s): David Nister of Bellevue WA US for nvidia corporation, Hon-Leung Lee of Bellevue WA US for nvidia corporation, Julia Ng of San Jose CA US for nvidia corporation, Yizhou Wang of Santa Clara CA US for nvidia corporation
IPC Code(s): G05D1/00, B60W30/09, B60W30/095, G05D1/245, G05D1/247, G05D1/248, G05D1/617, G05D1/65, G05D1/693, G06N3/08
CPC Code(s): G05D1/0214
Abstract: in various examples, a current claimed set of points representative of a volume in an environment occupied by a vehicle at a time may be determined. a vehicle-occupied trajectory and at least one object-occupied trajectory may be generated at the time. an intersection between the vehicle-occupied trajectory and an object-occupied trajectory may be determined based at least in part on comparing the vehicle-occupied trajectory to the object-occupied trajectory. based on the intersection, the vehicle may then execute the first safety procedure or an alternative procedure that, when implemented by the vehicle when the object implements the second safety procedure, is determined to have a lesser likelihood of incurring a collision between the vehicle and the object than the first safety procedure.
Inventor(s): Chenyi Chen of Fremont CA US for nvidia corporation, Artem Provodin of Highlands NJ US for nvidia corporation, Urs Muller of Keyport NJ US for nvidia corporation
IPC Code(s): G05D1/00, B60W30/00, B60W30/18, B62D15/02, G05D1/81, G06N3/045, G06N3/08, G06N20/00, G06V10/764, G06V10/82, G06V20/56
CPC Code(s): G05D1/0221
Abstract: in various examples, a trigger signal may be received that is indicative of a vehicle maneuver to be performed by a vehicle. a recommended vehicle trajectory for the vehicle maneuver may be determined in response to the trigger signal being received. to determine the recommended vehicle trajectory, sensor data may be received that represents a field of view of at least one sensor of the vehicle. a value of a control input and the sensor data may then be applied to a machine learning model(s) and the machine learning model(s) may compute output data that includes vehicle control data that represents the recommended vehicle trajectory for the vehicle through at least a portion of the vehicle maneuver. the vehicle control data may then be sent to a control component of the vehicle to cause the vehicle to be controlled according to the vehicle control data.
Inventor(s): Chenyi Chen of Fremont CA US for nvidia corporation, Artem Provodin of Highlands NJ US for nvidia corporation, Urs Muller of Keyport NJ US for nvidia corporation
IPC Code(s): G05D1/00, B60W30/00, B60W30/18, B62D15/02, G05D1/81, G06N3/045, G06N3/08, G06N20/00, G06V10/764, G06V10/82, G06V20/56
CPC Code(s): G05D1/0221
Abstract: in various examples, a trigger signal may be received that is indicative of a vehicle maneuver to be performed by a vehicle. a recommended vehicle trajectory for the vehicle maneuver may be determined in response to the trigger signal being received. to determine the recommended vehicle trajectory, sensor data may be received that represents a field of view of at least one sensor of the vehicle. a value of a control input and the sensor data may then be applied to a machine learning model(s) and the machine learning model(s) may compute output data that includes vehicle control data that represents the recommended vehicle trajectory for the vehicle through at least a portion of the vehicle maneuver. the vehicle control data may then be sent to a control component of the vehicle to cause the vehicle to be controlled according to the vehicle control data.
Inventor(s): Sharan Ashwathnarayan of Bangalore IN for nvidia corporation, Debalina Bhattacharjee of Bangalore IN for nvidia corporation, Ashok Kelur of Santa Clara CA US for nvidia corporation, Alok Parikh of Bangalore IN for nvidia corporation, Yogesh Kini of Bangalore IN for nvidia corporation, Amit Rao of Bangalore IN for nvidia corporation, Aingarathasan Paramakuru of Pickering CA for nvidia corporation, Kathleen E. Danielson of San Francisco CA US for nvidia corporation, Daniel Jonathan Hettena of Princeton NJ US for nvidia corporation, Vladislav Buzov of San Ramon CA US for nvidia corporation
IPC Code(s): G06F9/50, G06F9/48, G06F9/52
CPC Code(s): G06F9/5016
Abstract: apparatus, systems, and techniques to share memory. in at least one embodiment, a processor comprises one or more circuits to allocate memory to at least two heterogeneous processing cores in response to performing one or more instructions associated with one or more application programming interfaces based, at least in part, on one or more attributes associated with the at least two heterogeneous processing cores.
Inventor(s): Juana NAKFOUR of Hawthorn Woods IL US for nvidia corporation
IPC Code(s): G06F9/50
CPC Code(s): G06F9/5027
Abstract: in various examples, each hosted application may be modeled with a corresponding application-specific resource consumption model that predicts a measure of that application's anticipated resource utilization at some future time based on an input representation of one or more features of the current state of an instance of the hosted application. for cloud gaming, those features may include the current level being played, current obstacles, user results playing the level or obstacles, metadata quantifying one or more aspects of the level or obstacles, game progress, etc. as such, application-specific models may be used to predict resource demands at a future time and schedule resource allocations accordingly. the present techniques may be used to manage and reallocate resources for applications such as game streaming applications, remote desktop applications, simulation applications (e.g., an autonomous or semi-autonomous vehicle simulation), virtual reality (vr) and/or augmented reality (ar) streaming applications, and/or other application types.
Inventor(s): Soham Jayesh Desai of Jacksonville FL US for nvidia corporation, Rami Ailabouni of Melbourne AU for nvidia corporation, Newton Paine Liu of Santa Clara CA US for nvidia corporation, Binu Ramakrishnan of Santa Clara CA US for nvidia corporation
IPC Code(s): G06F11/14, G06F21/60
CPC Code(s): G06F11/1464
Abstract: an integrated circuit includes a host interface coupled to a host device executing a tenant operating system (os) on bare metal and hardware accelerator(s) coupled to the host interface and a network interface. the hardware accelerator(s) receive, over the host interface, a snapshot request relating to a snapshot of tenant os. snapshot request includes a location, in a physical memory of the host device, of a swap file having contents of random access memory of the host device. the hardware accelerator(s) encrypt the swap file and initiate transfer of the encrypted swap file to a network storage device coupled to a cloud-based server. the hardware accelerator(s) send, over the network interface, to a snapshot manager hosted by the cloud-based server, metadata associated with storing the encrypted swap file in the cloud-based server, to allow the snapshot manager to manage the snapshot of the tenant os.
Inventor(s): Siamak Nazari of Mountain View CA US for nvidia corporation, Jonathan Andrew McDowell of Belfast GB for nvidia corporation, Philip Herron of Lisburn GB for nvidia corporation
IPC Code(s): G06F11/14, G06F11/20
CPC Code(s): G06F11/1464
Abstract: a storage platform () improves data flow when modifying mirrored volumes. a backup storage component (a) that receives a service request keeps a copy of change data when redirecting the service request to a primary storage component (b) that owns the volume that the service request targets. the primary storage (b) component does not need to return the change data to the backup storage component (a) when the primary storage component (b) instructs the backup storage component (a) to apply the modification request to the backup copy of the volume.
20250138999. MEMORY MANAGEMENT SYSTEM_simplified_abstract_(nvidia corporation)
Inventor(s): Sean Lee of Kirkland WA US for nvidia corporation, Vinod Grover of Mercer Island WA US for nvidia corporation, James Clarkson of Tewkesbury GB for nvidia corporation
IPC Code(s): G06F12/02, G06F3/06
CPC Code(s): G06F12/023
Abstract: a computer system manages the allocation of memory to an application program using a dependency tree. the dependency tree informs a memory manager of data inputs, data outputs, and intermediate values associated with execution of the application program. the memory manager allocates a single heap structure within a physical memory. data associated with each node of the dependency tree is allocated to the heap structure so that data input values are allocated in a contiguous block, and intermediate values are allocated separately. in various examples, as execution of the application program proceeds, the separation of intermediate values from non-intermediate values within the heap reduces memory fragmentation providing improved performance of the computer system as a whole.
20250139248. UNIVERSAL BOOT INTERFACE_simplified_abstract_(nvidia corporation)
Inventor(s): Varun Sampath of Santa Clara CA US for nvidia corporation
IPC Code(s): G06F21/57, G06F9/4401
CPC Code(s): G06F21/575
Abstract: systems and methods herein are for an interface that may be associated with a system-on- chip (soc) manager and a root of trust (rot) module and can receive boot media parameters of connected and expected devices. the interface may also initiate first mutable code (fmc) fetches which may be loaded to the rot module and may enforce a boot policy that may require acknowledgement and approval of at least the soc manager and the rot module to continue a boot process.
Inventor(s): Smbat Tonoyan of Los Gatos CA US for nvidia corporation, Paul Lee Chou of Santa Clara CA US for nvidia corporation, Mark Alan Overby of Snohomish WA US for nvidia corporation, James Jiayuan Zhang of San Jose CA US for nvidia corporation, Jay S. Huang of Sunnyvale CA US for nvidia corporation, Aishwarya Senthilkumar of Oddanchatram IN for nvidia corporation, Mukul Singhal of Hyderabad IN for nvidia corporation
IPC Code(s): G06F21/60
CPC Code(s): G06F21/602
Abstract: an instruction to disable a first cryptographic key of a computing device is received by a processor of the device. the first cryptographic key is embedded in the device during manufacturing to facilitate a boot sequence of the device. the instruction is signed using a cryptographic signature. the first cryptographic key is associated with a first priority indicator. the cryptographic signature is verified using a second cryptographic key embedded in the device during manufacturing. the second cryptographic key is associated with a second priority indicator. the first priority indicator is compared with the second priority indicator. responsive to determining that the second priority indicator supersedes the first priority indicator, the first cryptographic key is disabled.
Inventor(s): Kelly Eric Bowman of Provo UT US for nvidia corporation, Paul Cutsinger of Redmond WA US for nvidia corporation
IPC Code(s): G06F30/27, G06F30/12, G06F30/15, G06F111/02, G06F111/18
CPC Code(s): G06F30/27
Abstract: systems and methods of the present disclosure include bi-directional connectors to transmit information for supported content elements between two different content creation programs using a scene location. a content element may be associated with a data file that includes one or more supported features that may be used to render the content element within the scene location. for the one or more supported features, a dataset may be generated that can be used to establish connectors that permit a different content creation to edit or otherwise collaborate on the content element by modifying the attribute values for the one or more supported features. the modified values may then be processed and rendered within the scene location, thereby permitting heterogenous content creation programs to collaborate on a common content element.
20250139439. REPLACEMENT OF TRANSMISSION DATA_simplified_abstract_(nvidia corporation)
Inventor(s): Dennis Charles Abts of Rochester MN US for nvidia corporation
IPC Code(s): G06N3/084, G06N3/045, G06N3/10, H04L43/0823
CPC Code(s): G06N3/084
Abstract: apparatuses, systems, and techniques to replace one or more corrupt neural network gradient values with one or more corresponding surrogate neural network gradient values. in at least one embodiment, faulty gradient values are identified in a transmitted data packet and are replaced according to a replacement policy with a suitable surrogate value.
20250139783. SHAPE FUSION FOR IMAGE ANALYSIS_simplified_abstract_(nvidia corporation)
Inventor(s): David Jesus Acuna Marrero of Toronto CA for nvidia corporation, Towaki Takikawa of Waterloo CA for nvidia corporation, Varun Jampani of Nashua NH US for nvidia corporation, Sanja Fidler of Toronto CA for nvidia corporation
IPC Code(s): G06T7/12, G06F18/25, G06V10/20, G06V10/44, G06V10/764, G06V10/80, G06V10/82, G06V20/56
CPC Code(s): G06T7/12
Abstract: various types of image analysis benefit from a multi-stream architecture that allows the analysis to consider shape data. a shape stream can process image data in parallel with a primary stream, where data from layers of a network in the primary stream is provided as input to a network of the shape stream. the shape data can be fused with the primary analysis data to produce more accurate output, such as to produce accurate boundary information when the shape data is used with semantic segmentation data produced by the primary stream. a gate structure can be used to connect the intermediate layers of the primary and shape streams, using higher level activations to gate lower level activations in the shape stream. such a gate structure can help focus the shape stream on the relevant information and reduces any additional weight of the shape stream.
20250139827. 3D POSE ESTIMATION IN ROBOTICS_simplified_abstract_(nvidia corporation)
Inventor(s): Sravya Nimmagadda of Santa Clara CA US for nvidia corporation, David Weikersdorfer of Mountain View CA US for nvidia corporation
IPC Code(s): G06T7/73, B25J9/16, G06N3/045, G06N3/08, G06V20/10
CPC Code(s): G06T7/75
Abstract: an autoencoder may be trained to predict 3d pose labels using simulation data extracted from a simulated environment, which may be configured to represent an environment in which the 3d pose estimator is to be deployed. assets may be used to mimic the deployment environment such as 3d models or textures and parameters used to define deployment scenarios and/or conditions that the 3d pose estimator will operate under in the environment. the autoencoder may be trained to predict a segmentation image from an input image that is invariant to occlusions. further, the autoencoder may be trained to exclude areas of the input image from the object that correspond to one or more appendages of the object. the 3d pose may be adapted to unlabeled real-world data using a gan, which predicts whether output of the 3d pose estimator was generated from real-world data or simulated data.
20250139869. RAY-TRACING FOR AUTO EXPOSURE_simplified_abstract_(nvidia corporation)
Inventor(s): Jakub Boksansky of Munchen DE for nvidia corporation, Oliver Mark Wright of Northwich GB for nvidia corporation
IPC Code(s): G06T15/06, G06T15/20, G06T15/50
CPC Code(s): G06T15/06
Abstract: in various examples, a virtual light meter may be implemented along with ray tracing techniques in order to determine incident light valuesâe.g., incoming irradiance, incident radiance, etc.âfor adjusting auto exposure values of rendered frames. for example, one or more rays may be used to sample incident light over a sampling patternâsuch as a hemispherical sampling patternâfor any position in a virtual game environment. as a result, the incident light values may be sampled near a subject of interest in a scene or frame such that exposure values are consistent or stable regardless of the composition of the rendered frames.
Inventor(s): Yifang Xu of San Jose CA US for nvidia corporation, Xin Liu of Pleasanton CA US for nvidia corporation, Chia-Chih Chen of San Jose CA US for nvidia corporation, Carolina Parada of Boulder CO US for nvidia corporation, Davide Onofrio of San Francisco CA US for nvidia corporation, Minwoo Park of Cupertino CA US for nvidia corporation, Mehdi Sajjadi Mohammadabadi of Santa Clara CA US for nvidia corporation, Vijay Chintalapudi of Sunnyvale CA US for nvidia corporation, Ozan Tonkal of Munich DE for nvidia corporation, John Zedlewski of San Francisco CA US for nvidia corporation, Pekka Janis of Uusimaa FI for nvidia corporation, Jan Nikolaus Fritsch of Santa Clara CA US for nvidia corporation, Gordon Grigor of San Francisco CA US for nvidia corporation, Zuoguan Wang of Los Gatos CA US for nvidia corporation, I-Kuei Chen of Milpitas CA US for nvidia corporation, Miguel Sainz of Palo Alto CA US for nvidia corporation
IPC Code(s): G06V10/44, G06F18/2413, G06N3/084, G06T7/10, G06V10/46, G06V10/764, G06V10/82, G06V20/40, G06V20/56
CPC Code(s): G06V10/44
Abstract: in various examples, sensor data representative of an image of a field of view of a vehicle sensor may be received and the sensor data may be applied to a machine learning model. the machine learning model may compute a segmentation mask representative of portions of the image corresponding to lane markings of the driving surface of the vehicle. analysis of the segmentation mask may be performed to determine lane marking types, and lane boundaries may be generated by performing curve fitting on the lane markings corresponding to each of the lane marking types. the data representative of the lane boundaries may then be sent to a component of the vehicle for use in navigating the vehicle through the driving surface.
Inventor(s): Aki Petteri Niemi of British Columbia CA for nvidia corporation
IPC Code(s): G06V20/58, B60W60/00
CPC Code(s): G06V20/58
Abstract: disclosed are apparatuses, systems, and techniques for efficient latency reduction using efficient data fragmentation in live streaming and/or time-sensitive applications. in one embodiment, a processing device receives, via a plurality of input channels, an input into a data processing operation, the input including a plurality of units of sensor data. the processing device fragment units of sensor data into a predetermined number of portions, independent of a size of the units of sensor data, and generates an output of the data processing operation by processing the portions of the units of sensor data using a plurality of sequential stages, individual stages processing respective portions of sensor data.
Inventor(s): Evelina Bakhturina of Santa Clara CA US for nvidia corporation, Yang Zhang of New York NY US for nvidia corporation, Boris Ginsburg of Sunnyvale CA US for nvidia corporation
IPC Code(s): G10L13/08, G06F40/40, G10L13/047
CPC Code(s): G10L13/08
Abstract: systems and methods provide for text normalization or inverse text normalization using a hybrid language system that combines rule-based processing with neural or learned processing. for example, a hybrid rule-based and neural approach identifies semiotic tokens within a textual input and generates a set of potential plain-text conversions of the semiotic tokens. the plain-text conversions are weighted and evaluated by a trained language model that rescores the plain-text conversion based on context to identify a highest scoring plain-text conversion for further processing within a language system pipeline.
Inventor(s): Benjamin Giles Lee of Ridgefield CT US for nvidia corporation, Thomas Hastings Greer, III of Chapel Hill NC US for nvidia corporation
IPC Code(s): H01L25/065, H01L23/498, H01L25/18
CPC Code(s): H01L25/0652
Abstract: a circuit package includes a central chip and multiple input/output (io) chips disposed along a periphery of the central chip, wherein at least some of the io chips being non-rectangular and extending into corner regions of the periphery. the io chips may have non-rectangular patterned areas in the shape of isosceles trapezoids, right trapezoids, and stepped tables, for example.
Inventor(s): Ofek Abadi of Nahariya IL for nvidia corporation, Omer Wolkovitz of Kfar Saba IL for nvidia corporation
IPC Code(s): H04B1/16, H04B1/40
CPC Code(s): H04B1/1607
Abstract: an integrated circuit includes a first transceiver of multiple simultaneous bidirectional (sbd) transceivers that is coupled to a second transceiver across a channel. a signal detection circuit is coupled to a first receiver, a first transmitter, and to an i/o pad of the first transceiver. the signal detection circuit deactivates the first receiver. the signal detection circuit activates an activation circuit in response to deactivating the first receiver. the signal detection circuit detects, using the activation circuit, whether the second transmitter enters a transmission mode based on a transmission status of the first transmitter and on voltage transitions detected over the i/o pad from the second transmitter.
Inventor(s): Juana NAKFOUR of Hawthorn Woods IL US for nvidia corporation
IPC Code(s): H04L47/70, H04L47/80, H04L67/131
CPC Code(s): H04L47/83
Abstract: in various examples, each user of a hosted application may be modeled with a corresponding user-specific resource consumption model that predicts a measure of that user's anticipated (e.g., processing, memory or storage, and/or networking) resource utilization at some future time based on an input representation of one or more features of the user's current session, application (e.g., game) setup, skill or experience level, social media activity, some time series representing feature(s) for a series of interactions, the time of day, and/or other characteristics. as such, user-specific models may be used to predict resource demands at a future time and schedule resource allocations accordingly. the present techniques may be used to manage and reallocate resources for applications such as game streaming applications, remote desktop applications, simulation applications (e.g., an autonomous or semi-autonomous vehicle simulation), virtual reality (vr) and/or augmented reality (ar) streaming applications, and/or other application types.
Inventor(s): Karsten Julian Kreis of Vancouver CA for nvidia corporation, Robin Rombach of Heidelberg DE for nvidia corporation, Andreas Blattmann of Waldkirch DE for nvidia corporation, Seung Wook Kim of Toronto CA for nvidia corporation, Huan Ling of Toronto CA for nvidia corporation, Sanja Fidler of Toronto CA for nvidia corporation, Tim Dockhorn of Waterloo CA for nvidia corporation
IPC Code(s): H04N21/2343, G06T9/00, G06V10/24, G06V10/25, G06V10/82, H04N7/01
CPC Code(s): H04N21/234363
Abstract: in various examples, systems and methods are disclosed relating to aligning images into frames of a first video using at least one first temporal attention layer of a neural network model. the first video has a first spatial resolution. a second video having a second spatial resolution is generated by up-sampling the first video using at least one second temporal attention layer of an up-sampler neural network model, wherein the second spatial resolution is higher than the first spatial resolution.
Inventor(s): Animesh KHEMKA of Fremont CA US for nvidia corporation, Yining DENG of Fremont CA US for nvidia corporation, Richard RUSSELL of San Jose CA US for nvidia corporation
IPC Code(s): H04N23/667, B60R1/20, H04N23/11, H04N23/83
CPC Code(s): H04N23/667
Abstract: in various examples, an image processing pipeline may toggle between ir and rgb imaging modes in response to different thresholds of detected light intensity that depend on the toggling direction (e.g., a lower intensity threshold to switch from rgb to ir imaging and a higher intensity threshold to switch from ir to rgb imaging). for example, the image processing pipeline may switch from rgb to ir imaging in response to detecting an amount of light intensity (e.g., average intensity in a green channel) below a first threshold, and the image processing pipeline may switch from ir to rgb imaging in response to: (i) detecting an amount of light intensity (e.g., average intensity in a green channel) that exceeds a second threshold, and/or (ii) detecting a ratio of detected light intensities (e.g., ir to green) below a third threshold.
Inventor(s): Sakthivel SIVARAMAN of Sunnyvale CA US for nvidia corporation, Rajath SHETTY of Sunnyvale CA US for nvidia corporation, Animesh KHEMKA of Fremont CA US for nvidia corporation, Niranjan AVADHANAM of Saratoga CA US for nvidia corporation
IPC Code(s): H04N23/667, B60R1/20, H04N23/11, H04N23/83
CPC Code(s): H04N23/667
Abstract: in various examples, an image processing pipeline may switch between different operating or switching modes based on speed of ego-motion and/or the active gear (e.g., park vs. drive) of a vehicle or other ego-machine in which an rgb/ir camera is being used. for example, a first operating or switching mode that toggles between ir and rgb imaging modes at a fixed frame rate or interval may be used when the vehicle is in motion, in a particular gear (e.g., drive), and/or traveling above a threshold speed. in another example, a second operating or switching mode that toggles between ir and rgb imaging modes based on detected light intensity may be used when the vehicle is in stationary, in park (or out of gear), and/or traveling below a threshold speed.
- NVIDIA Corporation
- A63F13/355
- CPC A63F13/355
- Nvidia corporation
- B60W50/10
- B60W60/00
- G06V20/58
- G06V20/59
- G06V20/62
- G06V30/14
- G06V30/19
- G06V30/262
- G10L15/183
- CPC B60W50/10
- B60W50/14
- G10L13/027
- G10L15/22
- CPC B60W50/14
- E01F13/02
- G09F9/30
- CPC E01F13/028
- G01C21/00
- G01C21/34
- G06T7/536
- G06T7/73
- G06V20/56
- CPC G01C21/3848
- G05D1/00
- G05D1/228
- G06F18/214
- G06F18/23
- G06F18/2411
- G06N3/04
- G06V10/44
- G06V10/48
- G06V10/75
- G06V10/764
- G06V10/776
- G06V10/82
- G06V10/94
- CPC G05D1/0077
- B60W30/09
- B60W30/095
- G05D1/245
- G05D1/247
- G05D1/248
- G05D1/617
- G05D1/65
- G05D1/693
- G06N3/08
- CPC G05D1/0214
- B60W30/00
- B60W30/18
- B62D15/02
- G05D1/81
- G06N3/045
- G06N20/00
- CPC G05D1/0221
- G06F9/50
- G06F9/48
- G06F9/52
- CPC G06F9/5016
- CPC G06F9/5027
- G06F11/14
- G06F21/60
- CPC G06F11/1464
- G06F11/20
- G06F12/02
- G06F3/06
- CPC G06F12/023
- G06F21/57
- G06F9/4401
- CPC G06F21/575
- CPC G06F21/602
- G06F30/27
- G06F30/12
- G06F30/15
- G06F111/02
- G06F111/18
- CPC G06F30/27
- G06N3/084
- G06N3/10
- H04L43/0823
- CPC G06N3/084
- G06T7/12
- G06F18/25
- G06V10/20
- G06V10/80
- CPC G06T7/12
- B25J9/16
- G06V20/10
- CPC G06T7/75
- G06T15/06
- G06T15/20
- G06T15/50
- CPC G06T15/06
- G06F18/2413
- G06T7/10
- G06V10/46
- G06V20/40
- CPC G06V10/44
- CPC G06V20/58
- G10L13/08
- G06F40/40
- G10L13/047
- CPC G10L13/08
- H01L25/065
- H01L23/498
- H01L25/18
- CPC H01L25/0652
- H04B1/16
- H04B1/40
- CPC H04B1/1607
- H04L47/70
- H04L47/80
- H04L67/131
- CPC H04L47/83
- H04N21/2343
- G06T9/00
- G06V10/24
- G06V10/25
- H04N7/01
- CPC H04N21/234363
- H04N23/667
- B60R1/20
- H04N23/11
- H04N23/83
- CPC H04N23/667