Assemblies Comprising Memory Cells and Select Gates; and Methods of Forming Assemblies

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Assemblies Comprising Memory Cells and Select Gates; and Methods of Forming Assemblies

This abstract first appeared for US patent application 20250149072 titled 'Assemblies Comprising Memory Cells and Select Gates; and Methods of Forming Assemblies

Original Abstract Submitted

some embodiments include an assembly having a stack of alternating dielectric levels and conductive levels. channel material pillars extend through the stack. some of the channel material pillars are associated with a first sub-block, and others of the channel material pillars are associated with a second sub-block. memory cells are along the channel material pillars. an insulative level is over the stack. a select gate configuration is over the insulative level. the select gate configuration includes a first conductive gate structure associated with the first sub-block, and includes a second conductive gate structure associated with the second sub-block. the first and second conductive gate structures are laterally spaced from one another by an intervening insulative region. the first and second conductive gate structures have vertically-spaced conductive regions, and have vertically-extending conductive structures which electrically couple the vertically-spaced conductive regions to one another. some embodiments include methods of forming assemblies.