Micron technology, inc. (20250138744). TEST MODE STATE MACHINE FOR A MEMORY DEVICE
TEST MODE STATE MACHINE FOR A MEMORY DEVICE
Organization Name
Inventor(s)
Rucha Deepak Geedh of Folsom CA US
Manjinder Singh Bains of Yuba City CA US
Roopal Amit Patel of Folsom CA US
TEST MODE STATE MACHINE FOR A MEMORY DEVICE
This abstract first appeared for US patent application 20250138744 titled 'TEST MODE STATE MACHINE FOR A MEMORY DEVICE
Original Abstract Submitted
systems, methods, and apparatus for a memory device having test mode state machines configured to perform self-testing. in one approach, a memory array has memory cells. periphery logic of the memory device receives a command from a host device to initiate self-testing. the periphery logic generates trigger signal(s) in response to receiving the command. control circuitry (e.g., a controller) has state machine(s) that receives the trigger signal(s) and initiates execution of a command sequence. the command sequence includes various orders of operations such as read, write, or delay. a state machine can be integrated into each of multiple partitions of the memory array.