Micron technology, inc. (20250013579). STORING A LOGICAL-TO-PHYSICAL MAPPING IN NAND MEMORY
STORING A LOGICAL-TO-PHYSICAL MAPPING IN NAND MEMORY
Organization Name
Inventor(s)
Sanjay Subbarao of Irvine CA US
STORING A LOGICAL-TO-PHYSICAL MAPPING IN NAND MEMORY
This abstract first appeared for US patent application 20250013579 titled 'STORING A LOGICAL-TO-PHYSICAL MAPPING IN NAND MEMORY
Original Abstract Submitted
a processing device receives a request specifying a logical address associated with a host-initiated operation directed at a first portion of a memory device. the processing device accesses a second l2p table comprising a mapping between logical addresses and physical addresses in a second portion of the memory device. a physical location within the second portion of the memory device is identified based on the second l2p table. the physical location corresponds to a portion of a first l2p table that specifies a physical address within the first portion of the memory device that corresponds to the logical address. the physical address is identified based on the portion of the first l2p table and the host-initiated operation is performed at the physical address.