Micron technology, inc. (20240413840). ITERATIVE ERROR CORRECTION IN MEMORY SYSTEMS
ITERATIVE ERROR CORRECTION IN MEMORY SYSTEMS
Organization Name
Inventor(s)
Marco Sforzin of Boise ID (US)
ITERATIVE ERROR CORRECTION IN MEMORY SYSTEMS
This abstract first appeared for US patent application 20240413840 titled 'ITERATIVE ERROR CORRECTION IN MEMORY SYSTEMS
Original Abstract Submitted
a system and method for memory error detection and recovery in a decoding system in cxl components is presented. the method includes receiving, into a first decoder within the decoding system, a memory transfer block (mtb) having data and parity information, and having a vertical portion and a horizontal portion, performing error detection and correction on the vertical portion of the mtb using binary hamming code logic within the first decoder; and upon performing error detection and correction in the first decoder, then forwarding mtb to a second decoder, and performing error detection and correction, via the second decoder, on the horizontal portion of the mtb using a non-binary hamming code logic within the second decoder such that the first and second decoders perform the error detection and correction on the vertical and horizontal portions of the mtb in a serial manner.