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Micron technology, inc. (20240256375). AUTOMATED OPTIMIZATION OF ERROR-HANDLING FLOWS IN MEMORY DEVICES

From WikiPatents

AUTOMATED OPTIMIZATION OF ERROR-HANDLING FLOWS IN MEMORY DEVICES

Organization Name

micron technology, inc.

Inventor(s)

Jay Sarkar of San Jose CA US

Ipsita Ghosh of New Garia, Kolkata IN

Vamsi Pavan Rayaprolu of Santa Clara CA US

AUTOMATED OPTIMIZATION OF ERROR-HANDLING FLOWS IN MEMORY DEVICES

This abstract first appeared for US patent application 20240256375 titled 'AUTOMATED OPTIMIZATION OF ERROR-HANDLING FLOWS IN MEMORY DEVICES

Original Abstract Submitted

systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. the processing device can perform operations including selecting sample data residing in the memory device; running a test on the sample data regarding a set of error-handling operations; and generating log data comprising a first order of the set of error-handling operations to be performed on data residing in a segment of the memory device.

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