Kioxia Corporation patent applications on 18th September 2025
Patent Applications by Kioxia Corporation on 18th September 2025
Kioxia Corporation: 44 patent applications
Kioxia Corporation has applied for patents in the areas of H10B43/27 (ELECTRONIC MEMORY DEVICES, 15), H10B43/10 (ELECTRONIC MEMORY DEVICES, 8), H10B43/35 (ELECTRONIC MEMORY DEVICES, 7), H10B41/27 (ELECTRONIC MEMORY DEVICES, 7), H01L25/18 (the devices being of types provided for in two or more different subgroups of the same main group of groups, 6)
Patent Applications by Kioxia Corporation
20250291243. INSPECTION DEVICE, INSPECTION METHOD, AND MEDIUM
Abstract: An inspection device for a photomask for manufacturing a semiconductor substrate, includes a processor configured to: acquire design data representing a shape of a designed mask pattern to be formed on a photomask, acquire image data representing a shape of a mask pattern formed on the photomask man...
20250291244. METHOD OF GENERATING DROP RECIPE, IMPRINTING METHOD, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
Abstract: A method of generating a drop recipe includes: acquiring first information indicating a position of a step and second information indicating a position of an outer edge of the substrate, in a first shot area among shot areas provided on a substrate; setting third information indicating a first area ...
20250291494. INFORMATION PROCESSING APPARATUS, METHOD FOR CONTROLLING INFORMATION PROCESSING APPARATUS, NON-TRANSITORY RECORDING MEDIUM STORING CONTROL TOOL, HOST DEVICE, NON-TRANSITORY RECORDING MEDIUM STORING PERFORMANCE EVALUATION TOOL, AND PERFORMANCE EVALUATION METHOD FOR EXTERNAL MEMORY DEVICE
Abstract: According to the embodiments, a nonvolatile memory device is configured to store a normal operating system, and store a bootloader. A host device is capable of initiating the normal operating system by using the bootloader. The host device is configured to determine whether a first condition is esta...
20250291501. SEMICONDUCTOR MEMORY DEVICE
Abstract: A semiconductor memory device capable of reducing the chip size is provided. A semiconductor memory device includes first and second planes of memory cell arrays, first and second sense amplifiers connected to first and second bit lines connected to the first and second planes respectively. The semi...
20250291510. STORAGE DRIVE
Abstract: According to one embodiment, a controller of a storage drive receives, from a host, a read request designating a logical address range in a logical address space. The controller transfers, to a host memory in the host, first information indicating whether or not each of a plurality of logical addres...
20250291517. SEMICONDUCTOR MEMORY DEVICE, MEMORY SYSTEM, AND METHOD
Abstract: According to one embodiment, a semiconductor memory device includes a terminal group, a first device, and a second device. The first device includes a first register group to which a first address space is mapped and a memory cell array. The second device is provided between the terminal group and t...
20250291714. DATA COMPRESSION DEVICE, DATA DECOMPRESSION DEVICE, AND MEMORY SYSTEM
Abstract: According to one embodiment, a data compression device includes all-literal determination circuitry and end-of-block symbol addition circuitry. In a case where dictionary-based compression on a first data block is performed, the all-literal determination circuitry determines whether all one or more ...
20250291724. COMMUNICATION SYSTEM
Abstract: According to one embodiment, a communication system includes a host controller; communication devices; a cache device; and a path that couples the host controller and the cache device and couples the cache device and the communication devices in a ring shape, wherein the cache device includes: a fir...
20250291781. MANAGEMENT METHOD AND DATABASE DEVICE
Abstract: A first vector database stored in a storage device includes a group of first information pieces each indicating one of a plurality of first vectors that correspond to a plurality of nodes of a first directed graph. A management method is capable of reducing the amount of data written in the storage ...
20250291872. ANALYSIS DEVICE, ANALYSIS METHOD, AND RECORDING MEDIUM
Abstract: According to one embodiment, an analysis device includes a processor. The processor calculates a first contribution degree, which is a contribution degree of a first explanatory variable for a first set, based on a training data set used for generating a prediction model. The prediction model receiv...
20250292807. SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR MEMORY DEVICE
Abstract: A semiconductor memory device includes a stacked body including first conductive layers and first insulating layers alternately stacked on top of one another. The stacked body further includes a staircase portion with terrace surfaces respectively formed with the plurality of first conductive layers...
20250292808. MEMORY DEVICE
Abstract: According to one embodiment, a memory device includes a plurality of first wiring lines each extending in a first direction, a plurality of second wiring lines each extending in a second direction, a plurality of memory cells provided between the first and second wiring lines, each including a varia...
20250292809. SEMICONDUCTOR DEVICE AND SEMICONDUCTOR STORAGE DEVICE
Abstract: A semiconductor device includes a first substrate that includes a plurality of regions including a first region, a second region, and a third region between the first and second regions, a first transistor in the first region, a second transistor in the second region, a first trench in the third reg...
20250292811. MEMORY DEVICE
Abstract: A memory cell includes a first terminal and a second terminal. A first interconnect is coupled to the first terminal. A second interconnect is coupled to the second terminal. A first switch is coupled between the second interconnect and a third interconnect configured to be coupled to a first voltag...
20250292818. MAGNETIC MEMORY DEVICE
Abstract: According to one embodiment, a magnetic memory device includes a memory cell, a first power supply circuit, first, second and third switches, a comparator, a delay circuit and a sense amplifier. The memory cell includes a variable resistance element and a selector element. The first power supply cir...