Kabushiki Kaisha Toshiba patent applications on March 13th, 2025
Patent Applications by Kabushiki Kaisha Toshiba on March 13th, 2025
Kabushiki Kaisha Toshiba: 30 patent applications
Kabushiki Kaisha Toshiba has applied for patents in the areas of H01L29/16 (2), H01L29/06 (2), H02M1/00 (2), B25J9/00 (1), H02M5/46 (1) B25J9/0009 (1), H01L21/68785 (1), H10D62/8325 (1), H10D62/102 (1), H10D12/031 (1)
With keywords such as: semiconductor, layer, element, unit, information, third, device, embodiment, magnetic, and direction in patent application abstracts.
Patent Applications by Kabushiki Kaisha Toshiba
20250083302. ROBOTS WITH LIFT MECHANISMS_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Marius JURT of Bristol (GB) for kabushiki kaisha toshiba
IPC Code(s): B25J9/00, B25J5/00, B25J9/16, B25J13/08
CPC Code(s): B25J9/0009
Abstract: a robot () comprising a drive () for moving the robot () and a lift means () for elevating the robot () above a surface such that another identical robot () is able to move underneath the elevated robot ().
Inventor(s): Tomoshi OTSUKI of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Hideki KUBO of Fuchu Tokyo (JP) for kabushiki kaisha toshiba, Shinichiro OGAWA of Katsushika Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): B61L27/12, G06Q10/047, G06Q50/40
CPC Code(s): B61L27/12
Abstract: an information processing comprising a processing circuitry which acquire, with respect to a first route including first stop positions in which one of the first stop positions is a first transfer position, first train line information including a stop time and a departure time at the first stop positions of a first moving vehicle, acquire route information of a second route that includes second stop positions, one of the second stop positions being a second transfer position that allows a transfer to or from the first transfer position, and acquire number-of-passengers information on a number of passengers transferring from the first transfer position to the second transfer position or vice versa; and create second train line information including a stop time and a departure time at the second stop positions of a second moving vehicle, based on the first train line information, the route information and the number-of-passengers information.
20250083837. FLYING OBJECT MONITORING SYSTEM_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Yoshihiro OGINO of Yokohama (JP) for kabushiki kaisha toshiba
IPC Code(s): B64F5/60, G01S13/89
CPC Code(s): B64F5/60
Abstract: according to one embodiment, a flying object monitoring system comprises a reception unit which receives flight information of a flying object, a calculation unit which calculates acceleration in each flight direction of the flying object from the flight information, a representation unit which represents the calculated acceleration with an acceleration distribution image formed by plotting the calculated acceleration with respect to the flight direction, and a determination unit which determines whether the flying object is malfunctioning based on the acceleration distribution image.
20250083950. SENSOR_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Hiroaki YAMAZAKI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Yoshihiko KURUI of Chigasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): B81B7/02, G01F1/684, G01F1/69
CPC Code(s): B81B7/02
Abstract: according to one embodiment, a sensor includes a sensor portion that includes a first resistance element, a first opposing resistance element, a second resistance element, a second opposing resistance element, a third resistance element, a third opposing resistance element, a fourth resistance element, a fourth opposing resistance element, and a first conductive member. a direction from the first resistance element to the first opposing resistance element and a direction from the second resistance element to the second opposing resistance element are along a first direction. a second direction from at least a part of the first resistance element to the second resistance element crosses the first direction. a third direction from the third resistance element to the third opposing resistance element crosses a plane including the first and second directions. a direction from the fourth resistance element to the fourth opposing resistance element is along the third direction.
Inventor(s): Tatsuhiko Goto of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Akihiko Enamito of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Osamu Nishimura of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G01M7/02
CPC Code(s): G01M7/025
Abstract: a diagnostic apparatus includes an excitation unit, a first sound reception unit, a second sound reception unit, and a processor. the processor designates a plurality of various volumes for the excitation unit. the processor calculates a first reference impulse response, a second reference impulse response, a first evaluation impulse response, and a second evaluation impulse response. the processor calculates a correlation transfer function. the processor calculates a difference between a first evaluation characteristic and a first reference characteristic. the processor diagnoses a measurement object based on the difference and a characteristic that a volume of a vibration radiation sound shifts from a dead zone to a rise region to a linear region to a saturation zone in this order as a volume of the excitation sound changes.
Inventor(s): Nobukatsu SUGIYAMA of Kawasaki (JP) for kabushiki kaisha toshiba, Yumi FUJITA of Chuo (JP) for kabushiki kaisha toshiba, Tomokazu MORITA of Funabashi (JP) for kabushiki kaisha toshiba
IPC Code(s): G01R31/396, G01R31/3842
CPC Code(s): G01R31/396
Abstract: according to one embodiment, an information processing device includes a memory and one or more processors coupled to the memory. the one or more processors are configured to calculate a ratio between an assembled battery capacity of an assembled battery in which a plurality of battery cells are serially connected and a cell capacity of a specific battery cell in the plurality of battery cells included in the assembled battery, as an index indicating a degree of collapse of a cell balance of the assembled battery.
Inventor(s): Wataru WATANABE of Tokyo (JP) for kabushiki kaisha toshiba, Jumpei ANDO of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Toshiyuki ONO of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G05B19/418
CPC Code(s): G05B19/4184
Abstract: according to one embodiment, an abnormality detection apparatus includes a processor. the processor acquires analysis data, the analysis data including at least operation data among the operation data and history data, the operation data being data of a manufacturing apparatus configured to intermittently process at least one product, the history data relating to a manufacturing history of the product processed by the manufacturing apparatus. the processor sets an operational state of the manufacturing apparatus in the operation data based on the acquired analysis data. the processor detects abnormality of the manufacturing apparatus based on the operation data and the set operational state.
Inventor(s): Jun KANAI of Inagi Tokyo (JP) for kabushiki kaisha toshiba, Tatsuya UEHARA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Hayeong SHIN of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Daiki ISHIHARA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Toshiyuki KITO of Kodaira Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): G06F21/57
CPC Code(s): G06F21/577
Abstract: according to one embodiment, an information processing device includes one or more hardware processors configured to function as a generation unit, an identification unit, and a vulnerability risk level calculation unit. the generation unit generates dependence information including an execution user of a first evaluation target and a dependence relationship representing being in a dependence relationship with the first evaluation target and access authority information of a resource. the identification unit identifies a resource accessible by the first evaluation target based on the execution user and the access authority information. the vulnerability risk level calculation unit calculates a vulnerability risk level indicating a risk level of each vulnerability from the resource accessible by the first evaluation target and one or more pieces of vulnerability information.
Inventor(s): Yusuke AOKI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Hiroshi SAKAI of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Yuki SAKURAI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Yasuo NAMIOKA of Nerima Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): G06Q10/0631
CPC Code(s): G06Q10/063114
Abstract: according to an embodiment, a support device is configured to output a first work instruction and a safety instruction when a first worker performs a first task. the support device is further configured to output the first work instruction and not output the safety instruction, or output the first work instruction and output another safety instruction, when a second worker performs the first task.
Inventor(s): Hideo NISHIUCHI of Yokohama (JP) for kabushiki kaisha toshiba
IPC Code(s): G06T7/00, G06T7/13, G06T11/00
CPC Code(s): G06T7/0006
Abstract: in an embodiment, an information processing apparatus includes an image generation unit and a determination unit. the image generation unit generates input image data showing a pre-reflow state based on soldering-related design information, and applies a color or a pattern corresponding to color information set for each of a plurality of types of components, in the input image data, to each of the plurality of types of components. the determination unit determines appropriateness of a design shown in the design information by inputting, to a machine learning model outputting an inspection result of a post-reflow inspection in response to inputting of image data based on a pre-reflow image, the input image data.
Inventor(s): Weijun MAI of Ota (JP) for kabushiki kaisha toshiba, Atsushi KAWASAKI of Yokohama (JP) for kabushiki kaisha toshiba, Nao MISHIMA of Inagi (JP) for kabushiki kaisha toshiba, Tomoki WATANABE of Inagi (JP) for kabushiki kaisha toshiba
IPC Code(s): G06T7/55, G06T7/246
CPC Code(s): G06T7/55
Abstract: according to an embodiment, an information processing apparatus includes one or more hardware processors. the one or more hardware processors update parameters of the first estimation model and the second estimation model so as to optimize a first loss function including a term indicating a difference between the correspondence information and correspondence training data that is training data concerning correspondence between the first pixel and the second pixel, a second loss function including a term concerning a depth, and a third loss function including a term indicating a difference in pixel value between the first pixel and the second pixel whose correspondence is indicated by the correspondence information, and generate the first estimation model and the second estimation model represented by the updated parameters.
Inventor(s): Akihiko Enamito of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Takahiro Hiruma of Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): G10L21/0364, G10L21/034
CPC Code(s): G10L21/0364
Abstract: according to one embodiment, an acoustic control apparatus includes a processor. the processor calculates acoustic filter coefficients which are smaller in number than a plurality of sound sources, based on a first relational expression between acoustic filters applied to a voice signal containing information of voice reproduced by each of the sound sources, which is based on a sound increase control law that increases voice pressure at a sound increase control point by voices reproduced by the sound sources, and a second relational expression between the acoustic filters, which is based on an acoustic power minimization control law that minimizes acoustic power for voices reproduced by the sound sources. the processor applies the calculated acoustic filter coefficients to an input voice signal, and branch a voice signal to which a common acoustic filter coefficient is applied, into at least two of the sound sources.
Inventor(s): Naoyuki NARITA of Funabashi Chiba (JP) for kabushiki kaisha toshiba, Masayuki TAKAGISHI of Kunitachi Tokyo (JP) for kabushiki kaisha toshiba, Yuji NAKAGAWA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Tomoyuki MAEDA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G11B5/31, G11B5/00, H01F10/32
CPC Code(s): G11B5/3146
Abstract: according to one embodiment, a magnetic device includes a magnetic element including a first magnetic layer and a second magnetic layer, and a magnetic field generator. the magnetic field generator is configured to perform a first transition operation and a second transition operation. in the first transition operation, a first state where a first magnetic field is generated is configured to transit to a second state where a second magnetic field is generated. in the second transition operation, the second state is configured to transit to the first state. the first magnetic field includes a first component in a first orientation from the first magnetic layer to the second magnetic layer. the second magnetic field includes a second component in a second orientation from the second magnetic layer to the first magnetic layer.
20250087237. MAGNETIC DISK DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Yusuke Tomoda of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G11B5/55
CPC Code(s): G11B5/5539
Abstract: according to one embodiment, a magnetic disk device includes a disk, a write head, an adjustment unit, and a write processing unit. the adjustment unit adjusts each of a first adjustment value, a second adjustment value, and a third adjustment value. the write processing unit can select shingled magnetic recording and perform write processing based on the first to third adjustment values. when the number of the plurality of tracks of the band is t+1 and the number of unused sectors among the plurality of sectors of the band is e. the adjustment unit adjusts the first to third adjustment values to establish ext.
20250087247. MAGNETIC RECORDING/REPRODUCING DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Shino Zaima of Kamakura Kanagawa (JP) for kabushiki kaisha toshiba, Akiyo Mizutani of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G11B33/14
CPC Code(s): G11B33/146
Abstract: according to one embodiment, a magnetic recording/reproducing device includes a housing which accommodates a magnetic recording medium, and a magnetic head which records or reproduces magnetic data relative the magnetic recording medium, and a synthetic adsorbent provided in the housing and containing a polystyrene-divinylbenzene copolymer.
Inventor(s): Kazuyuki ITO of Fujisawa (JP) for kabushiki kaisha toshiba, Satoshi AKUTSU of Yokohama (JP) for kabushiki kaisha toshiba, Masahiro NARASAKI of Yokohama (JP) for kabushiki kaisha toshiba, Takuo KIKUCHI of Kamakura (JP) for kabushiki kaisha toshiba, Nobuaki MAKINO of Fujisawa (JP) for kabushiki kaisha toshiba, Tatsuya OHGURO of Yokohama (JP) for kabushiki kaisha toshiba, Yoshihiko FUJI of Nakatsu (JP) for kabushiki kaisha toshiba
IPC Code(s): H01F27/32, C23C16/30, C23C16/40, C23C16/56, H01F41/12
CPC Code(s): H01F27/323
Abstract: an insulating device includes an insulating part, and first and second coils. the insulating part includes first to third insulating layers. the first insulating layer includes a first central insulating region and a first outer perimeter insulating region. the second insulating layer includes a second central insulating region and a second outer perimeter insulating region. the third insulating layer includes a third central insulating region and a third outer perimeter insulating region. the third central insulating region includes a first center portion including silicon oxide. the third outer perimeter insulating region includes first and second outer perimeter portions. the first outer perimeter portion includes silicon oxide. the second outer perimeter portion includes silicon oxynitride. a thickness of the first center portion is greater than that of the first outer perimeter portion. a thickness of the second outer perimeter portion is greater than that of the first outer perimeter portion.
20250087526. SEMICONDUCTOR MANUFACTURING APPARATUS_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Shun HASEBE of Nonoichi Ishikawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L21/687, G01R1/073
CPC Code(s): H01L21/68785
Abstract: a semiconductor manufacturing apparatus according to the present embodiment includes a stage configured to support a semiconductor wafer. a probe card is positioned above the stage. a first electrode is formed of a conductive material, is movable on the stage from an outer side of the stage toward a center, and is contactable with a side surface of the semiconductor wafer.
Inventor(s): Sachiko FUJISAWA of Kawasaki (JP) for kabushiki kaisha toshiba, Seiichi SUENAGA of Yokohama (JP) for kabushiki kaisha toshiba, Yoichiro MORI of Yokohama (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L23/498, H01L21/48
CPC Code(s): H01L23/49861
Abstract: a bonded body according to an embodiment includes a ceramic substrate, a copper plate, and a bonding layer bonding the ceramic substrate and the copper plate. the bonding layer includes ag, cu, an active metal, and a first element. the first element is one or two selected from sn and in. a detection amount (mass %) of the first element divided by a detection amount (mass %) of ag at a first measurement point is within a range of not less than 0 and not more than 0.4 when any cross section is analyzed by sem-edx, and when a location at which a detection amount of cu is not less than 80 mass % and at which a change of a slope in a graph of the detection amount of cu is largest is taken as the first measurement point.
20250087620. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Tomoka HOSHINO of Kawaguchi Saitama (JP) for kabushiki kaisha toshiba, Daisuke HIRATSUKA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L23/00
CPC Code(s): H01L24/29
Abstract: according to one embodiment, a semiconductor device includes a metal spacer, a semiconductor chip having a metal electrode; and a bonding portion disposed between the metal spacer and the metal electrode. the bonding portion is formed of a porous metal sintered body. the metal sintered body includes first voids formed without being contained within the metal sintered body and second voids contained within the metal sintered body. a young's modulus of the bonding portion is lower than a young's modulus of each of the metal spacer and the metal electrode.
Inventor(s): Yumiko Sekiguchi of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Keigo Hoshina of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Yasuyuki Hotta of Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): H01M10/44, H01M50/204, H01M50/51, H02J7/00
CPC Code(s): H01M10/441
Abstract: in an embodiment, a management apparatus, managing a battery pack including a plurality of aqueous battery cells electrically connected in series, is provided. a control unit of the management apparatus performs constant-current charging of the battery pack until a voltage of the battery pack reaches a reference voltage value in response to at least an soc difference value between a highest-soc cell at a highest soc and a lowest-soc cell at a lowest soc among the plurality of aqueous battery cells reaching a reference difference value or greater. the control unit performs constant-voltage charging of the battery pack at the reference voltage value in response to the voltage of the battery pack reaching the reference voltage value through the constant-current charging.
Inventor(s): Akira FUJIMOTO of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Yosuke AKIMOTO of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Hiroaki YAMAZAKI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01M50/293, G01N27/407, G01N33/00
CPC Code(s): H01M50/293
Abstract: an electrochemical device includes a housing, a first electrochemical element present inside the housing and a porous structure occupying at least a part of the inside of the housing.
Inventor(s): Hidenori OKUNI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Takafumi SAKAMOTO of Machida Tokyo (JP) for kabushiki kaisha toshiba, Masaki NISHIKAWA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Kentaro TANIGUCHI of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H02M1/00, H02M5/46
CPC Code(s): H02M1/0003
Abstract: according to one embodiment, a control device is connected to at least three or a plurality of switching controllers converting ac signals into dc signals and outputting the dc signals or converting dc signals into ac signals and outputting the ac signals. the control device is configured to generate the same number of carrier frequencies as the switching controllers, rearrange the generated carrier frequencies in ascending or descending order and calculate a difference between two adjacent carrier frequencies among the generated carrier frequencies, and if all the calculated differences between adjacent carrier frequencies are different, set one of the generated carrier frequencies as the carrier frequency of one of the switching controllers in order.
Inventor(s): Takafumi SAKAMOTO of Machida Tokyo (JP) for kabushiki kaisha toshiba, Hidenori OKUNI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Masaki NISHIKAWA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Kentaro TANIGUCHI of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H02M1/44, H02M1/00
CPC Code(s): H02M1/44
Abstract: according to one embodiment, a control device is connected to a first switching controller and a second switching controller. the control device includes a transmitter/receiver configured to communicate with the first switching controller and the second switching controller, and a timing controller configured to control operation time points of the first switching controller and the second switching controller, based on a first distance corresponding to a distance between a target point corresponding to a point where electromagnetic noise emitted from the first switching controller and the second switching controller is suppressed and the first switching controller, and a second distance corresponding to a distance between the target point and the second switching controller.
20250088184. DRIVING DEVICE AND SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Takahiro KATO of Tokyo (JP) for kabushiki kaisha toshiba, Tatsunori SAKANO of Tokyo (JP) for kabushiki kaisha toshiba, Ryohei GEJO of Kawasaki (JP) for kabushiki kaisha toshiba
IPC Code(s): H03K17/567
CPC Code(s): H03K17/567
Abstract: an embodiment includes a controller and a driver. the controller determines and sets either of a first mode or a second mode. the first mode is set when a direction of a current into a semiconductor element is a forward direction. the second mode is set when the direction of the current into the semiconductor element is a backward direction. the semiconductor includes a reverse conducting igbt having dual gate electrodes. the diving unit generates independent gate signals for the dual gate electrodes in accordance with the setting of the controller. and the driver drives the dual gate electrodes as to shorten an off time of the semiconductor element in the first mode, and as to shorten a reverse recovery time in a diode operation of the semiconductor device in the second mode.
20250088185. SWITCHING CIRCUIT_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Yoshio Itagaki of Tokyo (JP) for kabushiki kaisha toshiba, Takayuki Teraguchi of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H03K17/687, H03H7/38
CPC Code(s): H03K17/687
Abstract: according to one embodiment, a switching circuit includes: a first terminal coupled to a first node; a first switch including a first end coupled to the first node and a second end coupled to a second node; a second switch and a first resistance coupled in parallel between the second node and a third node; a second terminal coupled to the third node; a third switch and a first inductor coupled in series between the second node and a ground; a fourth switch including a first end coupled to the first node and a second end coupled to a fourth node; a fifth switch and a second resistance coupled in parallel between the fourth node and a fifth node; a third terminal coupled to the fifth node; a sixth switch and a second inductor coupled in series between the fourth node and the ground.
Inventor(s): Masashi ITO of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Katsuyuki KIMURA of Kamakura Kanagawa (JP) for kabushiki kaisha toshiba, Koji KANAZAWA of Akishima Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): H04L9/08, H04L9/14
CPC Code(s): H04L9/0852
Abstract: according to an embodiment, a key management server device includes processing circuitry is configured to: receive, from a plurality of key generation nodes, quantum key distribution (qkd) keys generated through a key distillation process for qkd; identify qkd keys to be specified as targets for shaping processing with a partner key management server device, by exchanging identification information of the qkd keys with the partner key management server device; perform numbering in such a way that order of dividing a qkd key or of coupling a okd key with a part of a qkd key that is not used in previous shaping processing is identical with the partner key management server device; and perform shaping processing for shaping key lengths of okd keys to a fixed length by performing the division or the coupling in the order.
Inventor(s): Tatsuo SHIMIZU of Shinagawa Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L29/66, H01L21/04, H01L29/06, H01L29/16, H01L29/78
CPC Code(s): H10D12/031
Abstract: a semiconductor device manufacturing method of embodiments includes: forming a mask material having openings on a surface of a silicon carbide layer; performing first processing for implanting at least one substance selected from a group consisting of hydrogen (h), helium (he), and electrons into a first region of the silicon carbide layer by using the mask material as a mask; performing a first ion implantation for implanting p-type impurities into a second region shallower than the first region by using the mask material as a mask before the first processing or after the first processing; removing the mask material after the first processing and the first ion implantation; and performing a first heat treatment at a temperature equal to or more than 1600� c. after removing the mask material.
Inventor(s): Shingo SATO of Kanazawa Ishikawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L29/06, H01L21/768, H01L29/40
CPC Code(s): H10D62/102
Abstract: a semiconductor device includes an element region and a termination region. the semiconductor device includes a first electrode, a first semiconductor region, a second semiconductor region, a plurality of third semiconductor regions, a plurality of fourth semiconductor regions, a fifth semiconductor region, a sixth semiconductor region, a gate electrode, and a second electrode. the plurality of third semiconductor regions is arranged in a second direction. a pitch in the termination region of the plurality of third semiconductor regions increases away from the element region in the second direction. the plurality of fourth semiconductor regions is separated from the third semiconductor regions in the second direction. the plurality of fourth semiconductor regions is alternately arranged with the plurality of third semiconductor regions in the second direction.
Inventor(s): Mitsuhiro KUSHIBE of Setagaya Tokyo (JP) for kabushiki kaisha toshiba, Ryosuke IIJIMA of Setagaya Tokyo (JP) for kabushiki kaisha toshiba, Johji NISHIO of Machida Tokyo (JP) for kabushiki kaisha toshiba, Chiharu OTA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Tatsuo SHIMIZU of Shinagawa Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L29/16, H01L21/02
CPC Code(s): H10D62/8325
Abstract: according to one embodiment, a wafer includes a substrate including sic, and a first layer including sic. the first layer is in contact with the substrate. the first layer includes cr. the substrate does not include cr. or a concentration of cr in the substrate is lower than a concentration of cr in the first layer. a substrate length of the substrate in a second direction crossing a first direction from the substrate to the first layer is longer than a first layer length of the first layer in the second direction.
Inventor(s): Hideto SUGAWARA of Kanazawa Ishikawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L33/30, H01L33/00, H01L33/16
CPC Code(s): H10H20/824
Abstract: a semiconductor light-emitting device according to an embodiment includes a light-emitting layer, a semiconductor substrate, and a multilayer film part. the semiconductor substrate includes gallium arsenide. the gallium arsenide is a cubic crystal. the semiconductor substrate includes a substrate lower surface and a substrate upper surface. the substrate upper surface is tilted with respect to a (100) plane of the cubic crystal. the multilayer film part is positioned between the substrate upper surface and the light-emitting layer. the multilayer film part includes a first layer and a second layer. the first layer includes a first surface. the second layer is positioned between the first surface and the light-emitting layer. the second layer contacts the first surface. the second layer includes a second surface. an unevenness of the second surface is greater than an unevenness of the first surface.
Kabushiki Kaisha Toshiba patent applications on March 13th, 2025
- Kabushiki Kaisha Toshiba
- B25J9/00
- B25J5/00
- B25J9/16
- B25J13/08
- CPC B25J9/0009
- Kabushiki kaisha toshiba
- B61L27/12
- G06Q10/047
- G06Q50/40
- CPC B61L27/12
- B64F5/60
- G01S13/89
- CPC B64F5/60
- B81B7/02
- G01F1/684
- G01F1/69
- CPC B81B7/02
- G01M7/02
- CPC G01M7/025
- G01R31/396
- G01R31/3842
- CPC G01R31/396
- G05B19/418
- CPC G05B19/4184
- G06F21/57
- CPC G06F21/577
- G06Q10/0631
- CPC G06Q10/063114
- G06T7/00
- G06T7/13
- G06T11/00
- CPC G06T7/0006
- G06T7/55
- G06T7/246
- CPC G06T7/55
- G10L21/0364
- G10L21/034
- CPC G10L21/0364
- G11B5/31
- G11B5/00
- H01F10/32
- CPC G11B5/3146
- G11B5/55
- CPC G11B5/5539
- G11B33/14
- CPC G11B33/146
- H01F27/32
- C23C16/30
- C23C16/40
- C23C16/56
- H01F41/12
- CPC H01F27/323
- H01L21/687
- G01R1/073
- CPC H01L21/68785
- H01L23/498
- H01L21/48
- CPC H01L23/49861
- H01L23/00
- CPC H01L24/29
- H01M10/44
- H01M50/204
- H01M50/51
- H02J7/00
- CPC H01M10/441
- H01M50/293
- G01N27/407
- G01N33/00
- CPC H01M50/293
- H02M1/00
- H02M5/46
- CPC H02M1/0003
- H02M1/44
- CPC H02M1/44
- H03K17/567
- CPC H03K17/567
- H03K17/687
- H03H7/38
- CPC H03K17/687
- H04L9/08
- H04L9/14
- CPC H04L9/0852
- H01L29/66
- H01L21/04
- H01L29/06
- H01L29/16
- H01L29/78
- CPC H10D12/031
- H01L21/768
- H01L29/40
- CPC H10D62/102
- H01L21/02
- CPC H10D62/8325
- H01L33/30
- H01L33/00
- H01L33/16
- CPC H10H20/824