KABUSHIKI KAISHA TOSHIBA patent applications on March 20th, 2025
Patent Applications by KABUSHIKI KAISHA TOSHIBA on March 20th, 2025
KABUSHIKI KAISHA TOSHIBA: 73 patent applications
KABUSHIKI KAISHA TOSHIBA has applied for patents in the areas of H01L29/78 (13), H01L29/40 (8), H01L29/06 (7), H01L29/66 (6), G11B5/48 (3) G06F17/11 (3), G11B5/59688 (2), H10D64/117 (2), H10D30/668 (2), G11B5/4833 (2)
With keywords such as: semiconductor, electrode, region, device, portion, between, part, third, embodiment, and layer in patent application abstracts.
Patent Applications by KABUSHIKI KAISHA TOSHIBA
Inventor(s): Akiko SUZUKI of Ota JP for kabushiki kaisha toshiba, Yoshihiko NAKANO of Yokohama JP for kabushiki kaisha toshiba, Reiko YOSHIMURA of Kawasaki JP for kabushiki kaisha toshiba, Hitomi SAITO of Taito JP for kabushiki kaisha toshiba, Asato KONDO of Yokohama JP for kabushiki kaisha toshiba, Shinji MURAI of Sagamihara JP for kabushiki kaisha toshiba, Noriko TAKADA of Meguro JP for kabushiki kaisha toshiba
IPC Code(s): B01D53/14
CPC Code(s): B01D53/1475
Abstract: the present embodiment provides an acid gas absorbent producing less waste and having a low environmental load, a method for removing an acid gas using the acid gas absorbent, and an acid gas removal apparatus. in the acid gas absorbent according to the present embodiment, a solubility in water of a salt formed from a liquid amine compound and the acid gas is higher than a solubility in water of the liquid amine compound. further, the amine compound and water are separated into two phases before absorption of the acid gas or after desorption thereof, and, in this state, the acid gas absorbent is easily separated from water-soluble impurities and purified.
Inventor(s): Tomoshi OTSUKI of Tokyo JP for kabushiki kaisha toshiba, Shinichiro OGAWA of Kawasaki-shi JP for kabushiki kaisha toshiba, Hitoshi IYAMA of Kawasaki-shi JP for kabushiki kaisha toshiba, Hideki KUBO of Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): B61L27/14, B61L27/18
CPC Code(s): B61L27/14
Abstract: an information processing device comprises processing circuitry to: acquire pieces of train line information and departure and arrival times at each stop position of a train; split the train line information based on replacement stop positions at which a task for working on the train can switch between staffs, to obtain a plurality of pieces of task fragment information each indicating a task of a staff corresponding to each split train line part; and allocate the pieces of task fragment information to target durations to create work schedules indicating a schedule of tasks for each of the target durations, wherein a series of the tasks continuously allocated in each work schedule corresponds to a basic work schedule, each work schedule includes one or more basic work schedule and the processing circuitry performs allocation of the pieces of task fragment information based on a constraint related to the basic work schedule.
Inventor(s): Satoshi MIKOSHIBA of Yamato JP for kabushiki kaisha toshiba, Naoya FUJIWARA of Toshima JP for kabushiki kaisha toshiba, Yusuke KOFUJI of Yokohama JP for kabushiki kaisha toshiba, Yuki KUDO of Yokohama JP for kabushiki kaisha toshiba, Ryota KITAGAWA of Setagaya JP for kabushiki kaisha toshiba
IPC Code(s): C25B9/23, C25B1/04, C25B1/23, C25B3/26, C25B15/021, C25B15/023, C25B15/08
CPC Code(s): C25B9/23
Abstract: an electrochemical reaction device includes: a structure that includes: a cathode; an anode; a diaphragm, a cathode chamber; and an anode chamber; a first to a fourth flow path through which a first to fourth fluid flows respectively; at least one controller selected from a first and a second flow rate controller, a first and a second pressure controller, a temperature controller and a power supply, the controller including the first flow rate controller; a gas/liquid separator in the middle of the fourth flow path; a first flowmeter that measures a flow rate of the third fluid; a second flowmeter that measures a flow rate of the fourth fluid; and a control device that measures the sum of the flow rates of the first, third and fourth fluids and controls the controller according to the sum to control a pressure difference between the chambers.
20250092548. ELECTROLYSIS DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Jun TAMURA of Chuo JP for kabushiki kaisha toshiba, Yasuhiro KIYOTA of Kawasaki JP for kabushiki kaisha toshiba, Yoshitsune SUGANO of Kawasaki JP for kabushiki kaisha toshiba
IPC Code(s): C25B13/08
CPC Code(s): C25B13/08
Abstract: an electrolysis device in an embodiment includes an electrolysis cell including: a cathode chamber in which a reduction electrode is arranged and to which a gaseous substance to be reduced is supplied; an anode chamber in which an oxidation electrode is arranged and to which a substance to be oxidized in a liquid state or in a state of vaporized liquid is supplied; and a diaphragm provided between the cathode chamber and the anode chamber. at least one of the reduction electrode and the diaphragm includes a composite containing at least an inorganic oxide fine particle and an organic polymer material which binds the inorganic oxide fine particle.
Inventor(s): Masakazu YAMAGIWA of Yokohama JP for kabushiki kaisha toshiba, Yuki KUDO of Yokohama JP for kabushiki kaisha toshiba, Yasuhiro KIYOTA of Kawasaki JP for kabushiki kaisha toshiba, Akihiko ONO of Kita JP for kabushiki kaisha toshiba, Maki YONETSU of Mitaka JP for kabushiki kaisha toshiba, Ryota KITAGAWA of Setagaya JP for kabushiki kaisha toshiba, Satoshi MIKOSHIBA of Yamato JP for kabushiki kaisha toshiba
IPC Code(s): C25B15/02, C25B9/70
CPC Code(s): C25B15/02
Abstract: an electrolysis device includes: a first electrolysis cell to reduce a reducible material and oxidize an oxidizable material; a second electrolysis cell to reduce the reducible material and oxidize the oxidizable material; a first supply source to supply a first fluid containing gas of the reducible material to the cells; a second supply source to supply a second fluid containing liquid of the oxidizable material to the cells; and at least one power supply to supply a first and a second power supply current to the first and the second electrolysis cell respectively. the at least one power supply can set values of the first and second power supply currents so that a current density of current flowing through the second electrolysis cell when reducing the reducible material is higher than a current density of current flowing through the first electrolysis cell when reducing the reducible material.
Inventor(s): Naoya FUJIWARA of Toshima JP for kabushiki kaisha toshiba, Ryota KITAGAWA of Setagaya JP for kabushiki kaisha toshiba, Yusuke KOFUJI of Yokohama JP for kabushiki kaisha toshiba, Satoshi MIKOSHIBA of Yamato JP for kabushiki kaisha toshiba, Yuki KUDO of Yokohama JP for kabushiki kaisha toshiba
IPC Code(s): C25B15/021, C25B1/04, C25B9/19, C25B15/025, C25B15/08
CPC Code(s): C25B15/021
Abstract: an electrochemical reaction device includes: an electrolytic unit that includes a cathode, an anode, a diaphragm, a cathode and an anode chamber; a first flow path through which a first fluid containing a reducible material flows, and; a second flow path through which a second fluid containing an oxidizable material flows; a third flow path through which a third fluid containing a reduction product flows; a fourth flow path through which a fourth fluid containing an oxidation product flows; a humidifier in the middle of the first flow path to humidify the first fluid; and a condenser in the middle of the first flow path so as to follow the humidifier and to treat the humidified first fluid and thus condenses a part of water vapor in the humidified first fluid to produce a condensed water, and to control a ratio of the condensed water in the humidified first fluid.
Inventor(s): Keita NAGANO of Kawasaki Kanagawa JP for kabushiki kaisha toshiba, Hiroyuki OTA of Naka Kanagawa JP for kabushiki kaisha toshiba, Takeshi KOI of Machida Tokyo JP for kabushiki kaisha toshiba, Hiromichi ODAIRA of Machida Tokyo JP for kabushiki kaisha toshiba, Takehiko MURAMATSU of Yokohama Kanagawa JP for kabushiki kaisha toshiba, Hiroki NISHIYAMA of Kawasaki Kanagawa JP for kabushiki kaisha toshiba, Shumpei MIYAI of Yokohama Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): C25B15/08, B01D53/14, B01D53/18, B01D53/62, B01D53/77, B01D53/96
CPC Code(s): C25B15/085
Abstract: a cathode gas supply system according to an embodiment includes: a carbon dioxide electrolysis unit that electrolyzes the carbon dioxide gas, and discharges cathode gas containing the carbon monoxide gas and carbon dioxide gas; and a downstream carbon dioxide capture unit that captures the carbon dioxide gas contained in the cathode gas, and supplies the cathode gas to a processing unit.
Inventor(s): Hiroshi Ohno of Tokyo JP for kabushiki kaisha toshiba, Hiroya Kano of Kawasaki Kanagawa JP for kabushiki kaisha toshiba, Akifumi Ohno of Kawasaki Kanagawa JP for kabushiki kaisha toshiba, Akio Kawasaki of Kawasaki Kanagawa JP for kabushiki kaisha toshiba, Sayuri Suzuki of Kawasaki Kanagawa JP for kabushiki kaisha toshiba, Yoshiaki Takagi of Kawasaki Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): G01B11/30, H04N23/10, H04N23/56
CPC Code(s): G01B11/303
Abstract: according to one embodiment, an optical apparatus includes at least two light sources, illumination opening portions, and an imaging portion. the illumination opening portions are configured to partially block light emitted from the at least two light sources, respectively, to form illumination light. the imaging portion is configured to image an object using the illumination light. the at least two light sources are disposed at positions facing each other with an optical axis of the imaging portion interposed between the at least two light sources. the illumination light from the at least two light sources is formed to spread like a fan shape toward the object respectively by the illumination opening portions. the fan shape is defined on a reference plane including the optical axis of the imaging portion and on another plane parallel to the reference plane.
Inventor(s): Yoshiaki SUGIZAKI of Fujisawa Kanagawa JP for kabushiki kaisha toshiba, Hiroko MIKI of Kawasaki Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): G01N27/327, C12N15/115, G01N33/94
CPC Code(s): G01N27/3276
Abstract: a nucleic acid probe includes first and second nucleic acids. the first nucleic acid includes a binding site. the first nucleic acid includes first to seventh base sequences. the fourth base sequence is complimentary with the third base sequence. the fifth base sequence is complimentary with the second base sequence. the seventh base sequence is complimentary with the sixth base sequence. the binding site is positioned at least between the fourth base sequence and the seventh base sequence. the second nucleic acid includes an eighth base sequence. the eighth base sequence is complimentary with at least a portion of the first base sequence and at least a portion of the second base sequence. a number of bases of the eighth base sequence is more than a number of bases of the second base sequence.
20250093463. RADAR SYSTEM, METHOD, AND STORAGE MEDIUM_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Ryota SEKIYA of Kamakura Kanagawa JP for kabushiki kaisha toshiba, Hiroki MORI of Kawasaki Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): G01S7/35, G01S7/02, G01S13/46, G01S13/88, G01S13/89
CPC Code(s): G01S7/352
Abstract: according to one embodiment, a radar system includes first radar modules, second radar modules, and a processor. the processor causes one of the first radar modules to transmit one first radar signal and at least one second radar module of the second radar modules to transmit at least one second radar signal. a distance between the one of the first radar modules and the at least one second radar module is twice or more as long as a distance between the one of the first radar modules and a furthest point from the one of the first radar modules in a sensing area of the one of the first radar modules.
Inventor(s): Akihide SAI of Yokohama Kanagawa JP for kabushiki kaisha toshiba, Hisaaki KATAGIRI of Kawasaki Kanagawa JP for kabushiki kaisha toshiba, Satoshi KONDO of Kawasaki Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): G01S7/487, G01S7/481, G01S7/4865, G01S17/894
CPC Code(s): G01S7/4876
Abstract: an information processing apparatus has processing circuitry configured to generate a histogram indicating a relationship between a light reception time and a light reception frequency based on a plurality of received signals including reflected light from an object, detect a peak of the light reception frequency of the histogram, and judge whether there is a light propagation interference factor including at least one of fog, mist, haze, rain, and snow based on the histogram and the light reception time of the peak, wherein it is judged whether there is the light propagation interference factor based on the light reception time of the peak and a degree of change in the light reception frequency of the histogram between before and after the light reception time of the peak.
Inventor(s): Ryota SEKIYA of Kamakura Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): G01S13/04, G01S13/90
CPC Code(s): G01S13/04
Abstract: according to one embodiment, an information processing apparatus includes a processor. the processor is configured to acquire a first observation signal from a radar device with a plurality of antennas configured to transmit a radar signal and to receive a radar echo based on a reflected wave of the radar signal, generate a first radar image by executing a signal process based on a predetermined first condition, and generate a second radar image by executing a signal process based on a second condition. the first and second radar images are used as training data for a learning model to detect an object to which the radar signal is transmitted.
Inventor(s): Nobukatsu SUGIYAMA of Kawasaki Kanagawa JP for kabushiki kaisha toshiba, Junichiro OOGA of Kawasaki Kanagawa JP for kabushiki kaisha toshiba, Junji OAKI of Kawasaki Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): G05B19/425
CPC Code(s): G05B19/425
Abstract: according to one embodiment, a processing device includes a memory and one or more processors coupled to the memory. the one or more processors are configured to: divide shape data of a surface of an inspection object into a plurality of curved surfaces; calculate a plurality of teaching points indicating positions at which the inspection object is inspected by an inspection device mounted on a movable body; calculate a path between curved surfaces transitioning the plurality of curved surfaces and a path in a curved surface transitioning teaching points within the curved surface of each of the plurality of curved surfaces; and calculate, based on the path between the curved surfaces, the path in the curved surface, and movement performance of the movable body, an orbit of the movable body so that an inspection time of the inspection object becomes shorter.
Inventor(s): Akihiro YAMAGUCHI of Kita JP for kabushiki kaisha toshiba, Ken UENO of Tachikawa JP for kabushiki kaisha toshiba
IPC Code(s): G06F11/07
CPC Code(s): G06F11/0751
Abstract: an information processing device includes one or more processors. the one or more processors are configured to: adjust a first distance between first time-series data and a plurality of identification patterns corresponding to a plurality of classes by using a degree of existence indicating a degree by which a plurality of times of the first time-series data are times at which the plurality of respective identification patterns exist; calculate a first feature amount indicating a feature of the first time-series data by using the adjusted first distance; and obtain, by inputting the first feature amount to an estimation model learning a parameter, the similar identification pattern, and the degree of existence to reduce an estimation error, the identification pattern similar to the first time-series data, the class, and the degree of existence.
Inventor(s): Yohei HAMAKAWA of Kawasaki Kanagawa JP for kabushiki kaisha toshiba, Kosuke TATSUMURA of Yokohama Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): G06F17/11
CPC Code(s): G06F17/11
Abstract: an information processing system according to an embodiment includes an information processing device and a solver device. the information processing device generates a plurality of coefficients based on a combinatorial optimization problem, encodes a first coefficient represented by a predetermined first data type into a first identification value represented by a second data type having a smaller data size than the first data type, outputs, to the solver device, coefficient information including the first identification value instead of the first coefficient, acquires ground state information from the solver device, and outputs a solution of the combinatorial optimization problem based on the ground state information. in the solving process, the solver device executes an operation on the first coefficient by using a first restoration value corresponding to the first identification value represented by the restoration information. the first restoration value is expressed by the first data type.
Inventor(s): Yohei HAMAKAWA of Kawasaki Kanagawa JP for kabushiki kaisha toshiba, Kosuke TATSUMURA of Yokohama Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): G06F17/11, G06F7/544
CPC Code(s): G06F17/11
Abstract: an information processing system according to an embodiment solves a combinatorial optimization problem. the information processing system includes an information processing device and a solver device. a first coefficient among the plurality of coefficients is expressed by a predetermined first data type. the coefficient information includes, instead of the first coefficient, a first identification value expressed by a second data type having a smaller data size than the first data type. the solver device stores restoration information indicating a first restoration value corresponding to the first identification value. the first restoration value is expressed by the first data type. the solver device acquires the first identification value included in the coefficient information, and uses the first restoration value corresponding to the first identification value represented by the restoration information as the first coefficient when executing the operation on the first coefficient among the plurality of coefficients.
Inventor(s): Yohei HAMAKAWA of Kawasaki Kanagawa JP for kabushiki kaisha toshiba, Kosuke TATSUMURA of Yokohama Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): G06F17/11
CPC Code(s): G06F17/11
Abstract: an information processing system according to an embodiment includes an information processing device and a solver device. the information processing device generates a plurality of coefficients based on a combinatorial optimization problem, encodes a first coefficient represented by a predetermined first data type into a first identification value represented by a second data type having a smaller data size than the first data type, outputs, to the solver device, coefficient information including the first identification value instead of the first coefficient, acquires ground state information from the solver device, and outputs a solution of the combinatorial optimization problem based on the ground state information. in the solving process, the solver device executes an operation on the first coefficient by using a first restoration value corresponding to the first identification value represented by the restoration information. the first restoration value is expressed by the first data type.
20250094574. SYSTEM AND STORAGE MEDIUM_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Mikio Hashimoto of Bunkyo Tokyo JP for kabushiki kaisha toshiba, Atsushi Shimbo of Bunkyo Tokyo JP for kabushiki kaisha toshiba, Jiro Amemiya of Machida Tokyo JP for kabushiki kaisha toshiba, Hiroshi Tanaka of Yokohama Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): G06F21/55, G06F21/57
CPC Code(s): G06F21/554
Abstract: according to one embodiment, a system includes a central control device connected to a plurality of sub-devices each having an embedded computer. the central control device is configured to detect an anomality caused by a cyberattack, transmit a stop instruction to each of the sub-devices to stop an operation of the system, transmit a restart instruction to each of the sub-devices to restart each of the sub-devices by secure boot, transmit a diagnostic instruction to at least one sub-device to diagnose whether or not physical elements configuring the system are degraded and determine whether or not to resume the operation of the system based on a result of the restart executed in each of the sub-devices and a result of the diagnosis executed in the at least one sub-device.
Inventor(s): Kei MATSUOKA of Kawasaki Kanagawa JP for kabushiki kaisha toshiba, Yuki MIYACHI of Kawasaki Kanagawa JP for kabushiki kaisha toshiba, Akihiko ENAMITO of Kawasaki Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): G06F30/20
CPC Code(s): G06F30/20
Abstract: an information processing device according to an embodiment includes a processor connected to a memory. the processor serves to identify, as resonant frequency of components of a structure, frequency of first-type peaks included in a first-type transfer function waveform representing relationship between amplitude and frequency of output vibration. the output vibration occurs in the components of the structure when the structure is subjected to sweep excitation. the processor serves to calculate a vibration propagation path along which input vibration having the resonant frequency propagates when applied to the structure. the vibration propagation path is calculated based on frequency and half width of second-type peaks included in a second-type transfer function waveform representing relationship between amplitude and frequency of output vibration. the output vibration occurs in at least part of the components of the structure when the input vibration is applied to the structure for a predetermined vibration excitation duration.
Inventor(s): Xinyi ZHOU of Yokohama Kanagawa JP for kabushiki kaisha toshiba, Fumiya YAMAMOTO of Chigasaki Kanagawa JP for kabushiki kaisha toshiba, Takanori YOSHII of Kawasaki Kanagawa JP for kabushiki kaisha toshiba, Yasuo NAMIOKA of Nerima Tokyo JP for kabushiki kaisha toshiba, Takashi TANAKA of Asaka Saitama JP for kabushiki kaisha toshiba, Kazuhiro OKA of Yokohama Kanagawa JP for kabushiki kaisha toshiba, Takehiro KATO of Yokohama Kanagawa JP for kabushiki kaisha toshiba, Keisuke NISHIMURA of Fujisawa Kanagawa JP for kabushiki kaisha toshiba, Masahiro KOTAKE of Yokohama Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): G06F40/35
CPC Code(s): G06F40/35
Abstract: according to one embodiment, a processing device acquires an image, a coordinate, and dialog data communicated between a first device and a second device. the first device is used by a first person performing a task, and the second device is used by a second person. the processing device extracts at least one of a plurality of the coordinates based on the dialog data. the processing device associates the extracted at least one of the plurality of coordinates with the task.
Inventor(s): Mikito IWAMASA of Shinagawa Tokyo JP for kabushiki kaisha toshiba
IPC Code(s): G06F40/40
CPC Code(s): G06F40/40
Abstract: according to one embodiment, an information processing apparatus comprising a processing circuitry configured to: select, based on a content of an input question, a database corresponding to the question among a plurality of databases respectively storing different kinds of data; generate a prompt to be input to a language model based on the selected database and the question; and generate an answer based on the prompt and the language model.
Inventor(s): Takashi USUI of Saitama Saitama JP for kabushiki kaisha toshiba, Hiroshi OHNO of Chuo Tokyo JP for kabushiki kaisha toshiba
IPC Code(s): G06N3/0475, G06N3/08
CPC Code(s): G06N3/0475
Abstract: according to one embodiment, a waveform signal processing system according to an embodiment includes a neural network, a learner, and an extractor. the neural network is configured to generate at least first time-series data on noise and second time-series data on a signal other than noise on the basis of input random noise. the learner is configured to update parameters of the neural network on the basis of a loss function including a main limitation term of which a value becomes lower as synthetic time-series data obtained by adding the first time-series data and the second time-series data generated by the neural network and an observed time-series waveform including noise become more similar to each other. the extractor is configured to extract at least one of the first time-series data and the second time-series data generated by the neural network as a target signal on the basis of the parameters updated by the learner.
Inventor(s): Tomoshi OTSUKI of Tokyo JP for kabushiki kaisha toshiba, Shinichiro OGAWA of Kawasaki-shi JP for kabushiki kaisha toshiba, Hitoshi IYAMA of Kawasaki-shi JP for kabushiki kaisha toshiba, Hideki KUBO of Kawasaki-shi JP for kabushiki kaisha toshiba
IPC Code(s): G06Q10/0631
CPC Code(s): G06Q10/06315
Abstract: an information processing device comprising processing circuitry to acquire information on operations each including an operation duration, a number of vehicles necessary for execution of each operation, and train information including a number of vehicles included in each train, mergeable or splittable among two or more trains; and produce an operation plan by allocating one or more trains to each operation, a total number of vehicles included in the allocated trains to each operation matches the number of vehicles necessary for the operation. merge work of two or more trains is needed to allocate the two or more trains to one of the operations, and split work of the merged two or more trains is needed to allocate the two or more trains to different ones of the operations. the processing circuitry produces the operation plan based on a merge iteration number or a split iteration number.
Inventor(s): Hideyuki AISU of Kawasaki JP for kabushiki kaisha toshiba, Shizu SAKAKIBARA of Kawasaki JP for kabushiki kaisha toshiba, Takufumi YOSHIDA of Funabashi JP for kabushiki kaisha toshiba
IPC Code(s): G06Q10/087
CPC Code(s): G06Q10/087
Abstract: according to an embodiment, an information processing device includes processors configured to: determine, based on a plurality of pieces of rack data including first identification information of one or more kinds of products housed in each rack, a processing sequence of a plurality of pieces of first order data including second identification information of one or more kinds of products to be picked, and one or more racks from which the products identified by the second identification information are to be picked; and perform hierarchical clustering that repeats processing of merging similar or matching pieces of first order data into a cluster such that a cluster number of a plurality of clusters resulting from the hierarchical clustering becomes equal to or more than a station number of a plurality of work stations where housing containers corresponding to at least some pieces of first order data are placed.
Inventor(s): Hiroshi OHNO of Tokyo JP for kabushiki kaisha toshiba, Takashi USUI of Saitama Saitama JP for kabushiki kaisha toshiba
IPC Code(s): G06T7/507, G06T7/11, G06T7/90, G06T15/20
CPC Code(s): G06T7/507
Abstract: according to an embodiment, an optical processing method includes: inputting an image including direction information of light from an object as hue information for each pixel into an artificial neural network; and acquiring depth information of the object for the image based on a result output from the artificial neural network.
20250095674. DISK DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Ryogo HOSHI of Yokohama Kanagawa JP for kabushiki kaisha toshiba, Takuma KIDO of Mitaka Tokyo JP for kabushiki kaisha toshiba
IPC Code(s): G11B5/48
CPC Code(s): G11B5/4826
Abstract: according to one embodiment, a disk device includes a first adhesive attaching a slider to a suspension. a flexure of the suspension includes an outer surface of a metal plate and an insulator. the insulator surrounds the first adhesive. the insulator includes two first walls, a second wall, and a third wall. the first walls extend closer to each other toward a axis of a carriage. the second wall is spaced apart from the first walls and further away from the axis than the first walls. the third wall is located at a center of the insulator in a circumferential direction and is located between the first walls and the second wall. the third wall is shorter than the second wall. the distance between the second wall and the third wall is shorter than a distance between the first walls and the third wall.
20250095675. SUSPENSION ASSEMBLY AND DISK DRIVE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Kazuhiro FURUTANI of Yokosuka Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): G11B5/48, G11B5/60
CPC Code(s): G11B5/4833
Abstract: according to one embodiment, a suspension assembly includes a support plate, a wiring member provided on the support plate and including a head-mount surface, and a support protrusion which includes a first area having a first height and a second area having a second height smaller than the first height, and a magnetic head including a slider having a placement surface and a medium-facing surface opposed to the placement surface and a head portion provided at the slider, the placement surface being placed on the support protrusion and fixed on the head-mount surface, the medium-facing surface being tilted with respect to the head-mount surface such that a side on the second area is lower than a side on the second area.
20250095676. DISK DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Tomoyuki TOKIZAKI of Yokohama Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): G11B5/48
CPC Code(s): G11B5/4833
Abstract: a disk device according to one embodiment includes a base, a first cover, a second cover, and a damper. the base includes a bottom surface, a side wall protruding in a first direction from the bottom surface, and a support surface located at an end of the side wall in the first direction. the first cover is attached to the base to close the inner space. the second cover is joined to the base while being supported by the support surface, to cover the first cover. the damper includes a constrained layer in-between the first cover and the second cover and a viscoelastic material between the first cover and the constrained layer. the constrained layer includes a smaller-thickness part extending along the support surface and a larger-thickness part connected to the smaller-thickness part.
20250095679. MAGNETIC DISK DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Takeyori HARA of Kawasaki Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): G11B5/596
CPC Code(s): G11B5/59688
Abstract: according to one embodiment, a magnetic disk device comprises a head position demodulation unit which demodulates a position of the head by performing switching between normal servo demodulation for processing servo information written to a servo sector of the disk and short servo demodulation for processing servo information by a short servo system, and a controller comprises a head position prediction unit which predicts a head position, and the head position prediction unit performs position prediction by using a latest head position obtained by demodulation by the head position demodulation unit and a head position obtained by past demodulation by normal servo demodulation.
20250095680. MAGNETIC DISK APPARATUS AND METHOD_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Sho SUZUKI of Hachioji Tokyo JP for kabushiki kaisha toshiba, Naoki TAGAMI of Yokohama Kanagawa JP for kabushiki kaisha toshiba, Takeyori HARA of Kawasaki Kanagawa JP for kabushiki kaisha toshiba, Takayuki KAWABE of Sagamihara Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): G11B5/596, G11B5/012, G11B20/10, G11B21/10
CPC Code(s): G11B5/59688
Abstract: according to the embodiment, a controller of a magnetic disk apparatus acquires a first amplitude and a first phase of a first read waveform and a second amplitude and a second phase of a second read waveform by demodulating the first/second read waveforms. the first read waveform is a read waveform of a first burst pattern. the second read waveform is a read waveform of a second burst pattern. the controller acquires weights on the basis of the first amplitude, the second amplitude, the first phase, and the second phase. the controller corrects an initial phase of each of the first read waveform and the second read waveform by calculating a weighted average using the weights, the first phase, and the second phase. the controller executes positioning of the magnetic head on the basis of the corrected first read waveform and second read waveform.
Inventor(s): Takahiro MAGOME of Yokohama Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): G11B5/60
CPC Code(s): G11B5/6029
Abstract: according to one embodiment, a magnetic disk device detects a first optimal fly amount, estimates a first optimal fly amount distribution, obtains a movable distance and an optimal moving speed of a magnetic head, detects a second optimal fly amount, moves the magnetic head to a plurality of movement positions specified based on the movable distance and the optimal moving speed while sequentially positioning thereat, and writes a plurality of spiral servo patterns to a magnetic disk while controlling the amount of protrusion of the magnetic head so that the spacing between the magnetic head at each of the movement positions and the magnetic disk becomes the first and second optimal fly amounts.
Inventor(s): Susumu TAKEDA of Kawasaki Kanagawa JP for kabushiki kaisha toshiba, Kenichiro YAMADA of Minato Tokyo JP for kabushiki kaisha toshiba
IPC Code(s): G11B20/10
CPC Code(s): G11B20/10518
Abstract: according to one embodiment, an information processing device includes an acquisitor and a processor. the acquisitor is configured to acquire a reproduced signal based on a signal obtained from a magnetic recording medium. the reproduced signal includes first input data, second input data, and third input data. the processor is configured to perform a first process and a second process. in the first process, the processor is configured to derive a first derived feature value from a first inner product of a first feature value based on the first input data and a second feature value based on the second input data. in the second process, the processor is configured to derive a second derived feature value from a second inner product of a third feature value based on the third input data and the first derived feature value.
20250095684. MAGNETIC DISK APPARATUS AND METHOD_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Nobuhiro MAETO of Yokohama Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): G11B20/12
CPC Code(s): G11B20/1217
Abstract: according to an embodiment, tracks on a magnetic disk each include a long-distance sector having a length in the circumferential direction covering two or more servo sectors. a controller executes an acquisition operation to acquire one or more evaluation amounts on the basis of a track pitch in each of the two or more servo sectors included in a portion adjacent to the long-distance sector. the controller executes a protection operation to protect data of an adjacent track in a case where a total value of the one or more evaluation amounts exceeds a first threshold value.
20250095685. MAGNETIC DISK DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Tomohiko JIMBO of Fujisawa JP for kabushiki kaisha toshiba, Biswas DEBASISH of Shiki JP for kabushiki kaisha toshiba, Makoto OKAMOTO of Kodaira JP for kabushiki kaisha toshiba, Yasuhiko KATO of Setagaya JP for kabushiki kaisha toshiba
IPC Code(s): G11B25/04, G11B33/14
CPC Code(s): G11B25/043
Abstract: a magnetic disk device includes a disk rotatable in a rotation direction and a shroud that at least partially surrounds the disk along an outer edge of the disk with a gap from the outer edge of the disk. a guide vane is connected to the shroud at a downstream side of an airflow generated in the rotation direction. the guide vane has a structure that decelerates an airflow between the guide vane and the disk.
Inventor(s): Kazuyuki HIGASHI of Yokohama JP for kabushiki kaisha toshiba, Kazumichi TSUMURA of Shinagawa JP for kabushiki kaisha toshiba, Tomohiro SAITO of Yokohama JP for kabushiki kaisha toshiba, Takashi YODA of Hino JP for kabushiki kaisha toshiba, Munehiro OGASAWARA of Hiratsuka JP for kabushiki kaisha toshiba, Kenji HIRAKAWA of Narashino JP for kabushiki kaisha toshiba, Masayuki IWASE of Yokohama JP for kabushiki kaisha toshiba
IPC Code(s): H01J37/147, H01J37/04, H01J37/317, H01L23/00, H01L23/58
CPC Code(s): H01J37/1472
Abstract: an electronic component according to an embodiment includes: a first substrate including first through holes, a first substrate surface and a second substrate surface; first electrodes provided on each of the first through holes, and including a first end and a second end; second electrodes provided on each of the first through holes, facing each of the first electrodes, and including a third end facing the first end and a fourth end facing the second end; third electrodes connected to the first end and extending toward the third end; fourth electrodes connected to the second end and extending toward the fourth end; fifth electrodes connected to the third end, provided separately from each of the third electrodes and extending toward the first end; sixth electrodes connected to the fourth end, provided separately from each of the fourth electrodes and extending toward the second end.
Inventor(s): Seiya SAKAKURA of Hakusan Ishikawa JP for kabushiki kaisha toshiba
IPC Code(s): H01L21/265, H01L21/268, H01L29/739, H01L29/861
CPC Code(s): H01L21/2652
Abstract: according to one embodiment, a method for manufacturing a semiconductor device includes a first process, a second process, and a third process. the first process is performed on a semiconductor member including a first face and a crystal. the first process includes at least one of implanting a first element into a first portion of the semiconductor member from the first face or irradiating the first portion with a particle beam. in the second process, a second element is implanted into a first region of the semiconductor member and is not implanted into a second region of the semiconductor member. the first region and the second region are located between the first face and the first portion. the third process is performed to irradiate the semiconductor member with a first electromagnetic wave from the first face through the first region and the second region, after the second process.
Inventor(s): Takeyuki SUZUKI of Kaga Ishikawa JP for kabushiki kaisha toshiba
IPC Code(s): H01L21/304, H01L21/02, H01L21/311, H01L21/683
CPC Code(s): H01L21/304
Abstract: a manufacturing method for a semiconductor device according to an embodiment includes forming a first insulating layer on a ring-shaped convex area and a slope area of a semiconductor wafer which has a first surface and a second surface opposite to the first surface and has the ring-shaped convex area on a peripheral region of the first surface, a concave area on a central region of the first surface, and the slope area connecting the ring-shaped convex area and the concave area, providing a dicing tape on the semiconductor wafer on the first surface side, dividing the semiconductor wafer into a first member of the ring-shaped convex area and the slope area and a second member of the concave area by cutting the semiconductor wafer, and peeling off the first member of the ring-shaped area and the slope area from the dicing tape.
20250096129. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Tomoaki INOKUCHI of Yokohama JP for kabushiki kaisha toshiba, Tatsuo SHIMIZU of Tokyo JP for kabushiki kaisha toshiba, Yusuke KOBAYASHI of Yokohama JP for kabushiki kaisha toshiba, Shotaro BABA of Kawasaki JP for kabushiki kaisha toshiba, Hiro GANGI of Tokyo JP for kabushiki kaisha toshiba, Hiroki NEMOTO of Tokyo JP for kabushiki kaisha toshiba, Taichi FUKUDA of Yokohama JP for kabushiki kaisha toshiba, Tatsuya NISHIWAKI of Yokohama JP for kabushiki kaisha toshiba
IPC Code(s): H01L23/528, H01L23/532, H01L29/812
CPC Code(s): H01L23/528
Abstract: a semiconductor device includes a first conductive part, a second conductive part, a third conductive part, a first insulating part, and a semiconductor part of a first conductivity type. the second conductive part is separated from the first conductive part in a first direction. the third conductive part arranged with a portion of the second conductive part in a second direction crossing the first direction. the first insulating part includes a first insulating region located between the third conductive part and the portion of the second conductive part. the semiconductor part includes a first semiconductor region and a second semiconductor region. the first semiconductor region is located between the first conductive part and the second conductive part. the second semiconductor region is located between the first insulating region and the portion of the second conductive part. the second semiconductor region has a schottky junction with the second conductive part.
Inventor(s): Tomoko SUGIZAKI of Kawasaki JP for kabushiki kaisha toshiba, Norio TAKAMI of Yokohama JP for kabushiki kaisha toshiba, Keigo HOSHINA of Yokohama JP for kabushiki kaisha toshiba
IPC Code(s): H01M4/134, H01M4/02, H01M4/38, H01M4/62, H01M10/0525, H01M10/0568, H01M10/42
CPC Code(s): H01M4/134
Abstract: in general, according to one embodiment, an electrode includes an electrode layer and a film containing f, s, and n. the electrode layer includes at least one of a li metal or a li alloy. the film covers at least a part of a surface of the electrode layer. the electrode satisfies the following formula (1):
Inventor(s): Tomoko SUGIZAKI of Kawasaki JP for kabushiki kaisha toshiba, Norio TAKAMI of Yokohama JP for kabushiki kaisha toshiba, Keigo HOSHINA of Yokohama JP for kabushiki kaisha toshiba
IPC Code(s): H01M4/134, H01M4/02, H01M4/38, H01M4/62, H01M10/0525, H01M10/0568, H01M10/42
CPC Code(s): H01M4/134
Abstract:
Inventor(s): Kazuki ISE of Kawasaki Kanagawa JP for kabushiki kaisha toshiba, Yasuhiro HARADA of Isehara Kanagawa JP for kabushiki kaisha toshiba, Norio TAKAMI of Yokohama Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): H01M4/48, H01M4/36, H01M10/052
CPC Code(s): H01M4/48
Abstract: an active material includes a composite oxide represented by the general formula litinbwoand satisfying 0≤a≤b+3c+4, 0<b<2, 0<c<2, 1.9b+2.85c+4.75≤�≤2.1b+3.15c+5.25. a crystal structure of the composite oxide is at least one of a monoclinic structure and an orthorhombic structure.
Inventor(s): Yasunobu YAMASHITA of Meguro Tokyo JP for kabushiki kaisha toshiba, Keigo HOSHINA of Yokohama Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): H01M4/80, B60L50/64, H01M4/02, H01M4/66, H01M10/36
CPC Code(s): H01M4/801
Abstract: an electrode includes a current collector and an active material-containing portion. the current collector has a first porosity, and the electrode including the current collector and the active material-containing portion has a second porosity. the first porosity is 70% or more and 90% or less and the second porosity is 60% or more and 80% or less.
Inventor(s): Tatsuya KUZE of Yokohama Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): H01M8/04119, H01M8/04029, H01M8/04746
CPC Code(s): H01M8/04179
Abstract: a fuel cell system of an embodiment includes a fuel cell stack including a fuel electrode layer, an oxidizer electrode layer, and a cooling layer, a fuel-gas flow path configured to allow the fuel gas from the fuel electrode layer to pass therethrough, an oxygen-containing-gas flow path configured to allow the oxygen-containing gas from the oxidizer electrode layer to pass therethrough, a cooling-water flow path, a first bypass pipe configured to guide water in the fuel-gas flow path to the cooling-water flow path, a second bypass pipe configured to guide water in the oxygen-containing-gas flow path to the cooling-water flow path, and a suction pump provided in the cooling-water flow path on the downstream side of a connecting portion between the cooling-water flow path and the first bypass pipe and a connecting portion between the cooling-water flow path and the second bypass pipe.
Inventor(s): Hiroki MORI of Kawasaki Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): H01Q1/24, H01Q21/24, H01Q21/29
CPC Code(s): H01Q1/247
Abstract: according to one embodiment, a transmit/receive antenna module includes a radar circuit arranged at a substrate, a transmit antenna arranged at a first end portion of the substrate and connected to the radar circuit, a receive antenna arranged at a second end portion of the substrate and connected to the radar circuit. the transmit antenna is capable of transmitting an electromagnetic wave parallel to the substrate. the receive antenna is capable of receiving an electromagnetic wave parallel to the substrate.
Inventor(s): Qiang LIN of Kawaguchi Saitama JP for kabushiki kaisha toshiba, Tetsu SHIJO of Setagaya Tokyo JP for kabushiki kaisha toshiba, Yasuhiro KANEKIYO of Yokohama Kanagawa JP for kabushiki kaisha toshiba, Kenichiro OGAWA of Yokohama Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): H02J3/24, H02J3/32, H02J3/38
CPC Code(s): H02J3/241
Abstract: according to one embodiment, a control device for an electric power system capable of supplying power to load devices in a plurality of demand areas based on first to n-th power devices in first to n-th placement areas and configured to be able to perform at least one of discharge or charge of power, comprising: a controller configured to detect, based on information of power consumption in each of the demand areas, a demand area in which the power consumption fluctuates more significantly than usual, and determine, according to distances between a detected demand area and the first to n-th placement areas, a control parameter related to input and output of power in the first to n-th power devices.
Inventor(s): Tetsu SHIJO of Setagaya Tokyo JP for kabushiki kaisha toshiba
IPC Code(s): H02J9/06, H02J3/32, H02J7/00
CPC Code(s): H02J9/062
Abstract: according to one embodiment, an uninterruptible power supply connectable to a power line via which electric power from a power grid is supplied to a load device, comprising: a storage battery being chargeable/dischargeable; a monitor configured to monitor a state of charge of the storage battery; and a controller configured to control charging the storage battery from the power line and discharging from the storage battery to the power line, based on the state of charge of the storage battery and a difference between a first frequency being operation frequency of the power grid and a second frequency serving as a reference operation frequency for the power grid.
20250096622. ROTATING ELECTRIC MACHINE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Masaya HAGIWARA of Yokohama Kanagawa JP for kabushiki kaisha toshiba, Kei MATSUOKA of Kawasaki Kanagawa JP for kabushiki kaisha toshiba, Hiroaki KINOUCHI of Meguro Tokyo JP for kabushiki kaisha toshiba, Shinya SAKURADA of Saitama Saitama JP for kabushiki kaisha toshiba
IPC Code(s): H02K1/14, H02K9/22
CPC Code(s): H02K1/148
Abstract: a rotating electric machine of an embodiment includes a stator, a rotor, a housing, and a cover member. the stator includes a stator core and a coil. the stator core includes a core back portion. the core back portion has an annular shape centered on a center axis. the coil is attached to the stator core. the coil is located on the radially inside of the core back portion. the coil includes a coil straight portion and a pair of coil end portions. the coil straight portion extends in a straight line shape along the axial direction. the pair of coil end portions respectively protrude in the axial direction from both axial end surfaces of the stator core. the cover member includes a first cover portion. the first cover portion contacts one coil end portion so that the coil end portion is bent toward an inner peripheral surface of the housing and is brought into contact with the inner peripheral surface of the housing.
20250096631. ROTATING ELECTRIC MACHINE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Hiroaki KINOUCHI of Meguro Tokyo JP for kabushiki kaisha toshiba, Masaya HAGIWARA of Yokohama Kanagawa JP for kabushiki kaisha toshiba, Shinya SAKURADA of Saitama Saitama JP for kabushiki kaisha toshiba
IPC Code(s): H02K3/47, B64D27/30, H02K1/02, H02K1/278, H02K1/28, H02K21/14
CPC Code(s): H02K3/47
Abstract: in one embodiment, a rotating electric machine includes a rotor and a stator. the rotor is a rotor which is rotatable around a center axis. the stator surrounds the rotor from one radial side. the stator includes a back yoke, a coil unit, and a plurality of partition units. the back yoke has an annular shape centered on the center axis. the coil unit is disposed on the other radial side of the back yoke. the plurality of partition units partition a winding range in which the coil unit is disposed in a circumferential direction. each of the partition units includes a magnetic body portion made of a magnetic material. a circumferential dimension of the magnetic body portion is less than a circumferential dimension of the winding range. a radial dimension of the magnetic body portion is � or more of a radial dimension of the coil unit.
20250096649. ROTATING ELECTRIC MACHINE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Masaya HAGIWARA of Yokohama Kanagawa JP for kabushiki kaisha toshiba, Kei MATSUOKA of Kawasaki Kanagawa JP for kabushiki kaisha toshiba, Hiroaki KINOUCHI of Meguro Tokyo JP for kabushiki kaisha toshiba, Shinya SAKURADA of Saitama Saitama JP for kabushiki kaisha toshiba
IPC Code(s): H02K9/22, H02K1/16, H02K3/12, H02K5/04
CPC Code(s): H02K9/22
Abstract: a rotating electric machine of an embodiment includes a stator, a rotor, a housing, and a cover member. the stator includes a stator core and a coil. the stator core includes a core back portion. the core back portion has an annular shape centered on a center axis. the coil is attached to the stator core. the coil is located on the radially inside of the core back portion. the coil includes a coil straight portion and a pair of coil end portions. the coil straight portion extends in a straight line shape along an axial direction. the pair of coil end portions respectively protrude from both axial end surfaces of the stator core in the axial direction. the cover member is attached to the stator. the cover member contacts the coil end portion and presses against the inner peripheral surface of the housing.
Inventor(s): Masaya HAGIWARA of Yokohama Kanagawa JP for kabushiki kaisha toshiba, Hirofumi UENO of Ebina Kanagawa JP for kabushiki kaisha toshiba, Takashi KUMATA of Kawasaki Kanagawa JP for kabushiki kaisha toshiba, Takahiro KOKUBO of Hiratsuka Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): H02K15/02
CPC Code(s): H02K15/02
Abstract: a rotor manufacturing apparatus of an embodiment includes a rotor core support unit and a magnet support mechanism. the magnet support mechanism includes a pair of support members and a driving unit. the pair of support members face each other in a facing direction orthogonal to both a radial direction and an axial direction. a magnet is disposed between the pair of support members. the driving unit moves the pair of support members close to each other and away from each other in the facing direction. each of the pair of support members includes a support surface. the pair of support surfaces face each other in the facing direction. the pair of support surfaces contact circumferential end surfaces of the magnet. the pair of support surfaces are respectively inclined away from each other in the facing direction outwardly in the radial direction.
Inventor(s): Koji SUZUKI of Fuchu Tokyo JP for kabushiki kaisha toshiba, Yutaka YAMADA of Fuchu Tokyo JP for kabushiki kaisha toshiba
IPC Code(s): H02P21/22, H02P7/03, H02P21/00, H02P21/14
CPC Code(s): H02P21/22
Abstract: according to the present embodiment, a control device controlling a control target is provided which includes a first controller, a second controller, a detector, and a corrector. the first controller is configured to, by using a first measured value measured for the control target and a first command value that is a target value of the first measured value as inputs, generate a second command value. the second controller is configured to, by using a second measured value measured for the control target and the second command value as inputs, generate a target value supplied to the control target as a third command value. the detector is configured to detect a change in the second measured value and to change a control mode. the corrector is configured to generate a second correction value and correct the second controller in accordance with the control mode.
Inventor(s): Yoshimichi TANIZAWA of Yokohama Kanagawa JP for kabushiki kaisha toshiba, Yasuhiro KATSUBE of Yokohama Kanagawa JP for kabushiki kaisha toshiba, Ririka TAKAHASHI of Setagaya Tokyo JP for kabushiki kaisha toshiba, Yu YU of Yokohama Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): H04L9/14
CPC Code(s): H04L9/14
Abstract: according to one embodiment, an information processing device includes a processing circuit as a hardware processor and configured to establish encrypted tunnel communication with a second node by using a second encryption key subjected to encrypted relay transmission to the second node by a first encryption key shared, by quantum key distribution, with a plurality of first nodes adjacent to each other. the second node is one of the plurality of first nodes. the processing circuit is configured to cause a network interface (if) unit to transfer a third encryption key to the second node by the encrypted tunnel communication.
20250097600. SOLID-STATE IMAGING DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Masakazu MATSUURA of Yokohama Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): H04N25/77, H04N25/76
CPC Code(s): H04N25/77
Abstract: according to one embodiment, there is a solid-state imaging device including a chip. the chip includes a pixel array, a plurality of signal lines, a plurality of output circuits and a plurality of output terminals. in the pixel array, a plurality of pixel groups each including two or more pixels is arrayed at least in a column direction. the plurality of signal lines corresponds to the plurality of pixel groups, each of the plurality of signal lines being connected to a corresponding pixel group. the plurality of output circuits corresponds to the plurality of signal lines, each of the plurality of output circuits being connected to a corresponding signal line. the plurality of output terminals corresponds to the plurality of output circuits, each of the plurality of output terminals being connected to a corresponding output circuit.
Inventor(s): Tatsuhiko GOTO of Kawasaki Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): H04R5/04, H04S7/00
CPC Code(s): H04R5/04
Abstract: according to an embodiment, an acoustic signal processing apparatus includes processing circuitry. the processing circuitry includes a modulation frequency control unit, frequency shift processing unit, and amplitude control unit. the modulation frequency control unit is configured to control a first modulation frequency based on velocity information indicating a velocity of a sound source. the frequency shift processing unit is configured to perform single-sideband (ssb) modulation on a first acoustic signal in accordance with the first modulation frequency to generate a first modulated acoustic signal. the amplitude control unit is configured to control an amplitude of the first modulated acoustic signal.
Inventor(s): Tatsuhiko GOTO of Kawasaki Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): H04S7/00
CPC Code(s): H04S7/307
Abstract: according to one embodiment, an acoustic control apparatus includes a processor. the processor calculates a frequency characteristic of a filter from 1) a complex volume velocity of a sound radiated from each point sound source based on the number of point sound sources in a simulated rotating sound source and a lobe mode of the simulated rotating sound source, and 2) an acoustic transfer function between a sound receiving point and each point sound source, which is based on a radius of a circle formed by the point sound sources, a horizontal distance between a center of the circle and the sound receiving point, and a vertical distance between the center of the circle and the sound receiving point. the processor calculates the filter from the frequency characteristic of the filter. the processor stores the filter in a storage.
Inventor(s): Sachiko FUJISAWA of Kawasaki JP for kabushiki kaisha toshiba, Seiichi SUENAGA of Yokohama JP for kabushiki kaisha toshiba, Yoichiro MORI of Yokohama JP for kabushiki kaisha toshiba
IPC Code(s): H05K1/03, H01L23/15, H01L23/498
CPC Code(s): H05K1/0306
Abstract: a bonded body according to an embodiment includes a nitride ceramic member, and a metal member bonded with the nitride ceramic member via a bonding layer. a titanium nitride layer that includes titanium nitride as a major component is formed at a nitride ceramic member and the interface between the bonding layer. the titanium nitride layer includes a location at which an oxygen amount is not less than 1 at %.
20250098076. BOARD AND ELECTRONIC DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Kakeru YAMAGUCHI of Yokohama JP for kabushiki kaisha toshiba
IPC Code(s): H05K3/40, H05K1/11, H05K3/34
CPC Code(s): H05K3/4007
Abstract: according to an embodiment, a board includes a base material, a wiring pattern, an insulating member, and a covering portion. the wiring pattern is provided on the base material. the insulating member covers the base material and the wiring pattern, and has an opening corresponding to a bump forming portion of the wiring pattern. the covering portion is formed of a material having a solder contact angle larger than that of the bump forming portion in the opening, and covers a part of the bump forming portion.
20250098183. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Tomoaki INOKUCHI of Yokohama JP for kabushiki kaisha toshiba, Hiro GANGI of Tokyo JP for kabushiki kaisha toshiba, Yusuke KOBAYASHI of Yokohama JP for kabushiki kaisha toshiba, Shotaro BABA of Kawasaki JP for kabushiki kaisha toshiba, Hiroki NEMOTO of Tokyo JP for kabushiki kaisha toshiba, Taichi FUKUDA of Yokohama JP for kabushiki kaisha toshiba, Tatsunori SAKANO of Tokyo JP for kabushiki kaisha toshiba
IPC Code(s): H10B99/00, H01L29/40, H01L29/78, H01L29/94
CPC Code(s): H10B99/22
Abstract: a semiconductor device includes a major element including a first semiconductor region, a first electrode, a second electrode, a first gate electrode, and a first insulating member being positioned between the first gate electrode and the first semiconductor region, and a recording element electrically connected with the first electrode. the recording element records, as analog data, a maximum value of a change amount dv/dt of a voltage of the first electrode over time.
Inventor(s): Kazusa ARIMA of Komatsu Ishikawa JP for kabushiki kaisha toshiba
IPC Code(s): H01L29/739, H01L21/8234, H01L29/66, H01L29/78
CPC Code(s): H10D12/441
Abstract: a manufacturing method a semiconductor device according to an embodiment is a manufacturing method a semiconductor device located on a semiconductor wafer within a region surrounded by a first dicing line extending in a first direction and a second dicing line perpendicular to the first direction, the semiconductor device including a cell region and a termination region, the cell region including a semiconductor device located within a semiconductor substrate, the termination region including a metal wiring line located on the semiconductor substrate and electrically connected to the semiconductor device. in this method, a stopper film is formed around the metal wiring line in the termination region, a protection film covering the metal wiring line and ending at a side surface of the stopper film is formed, and the semiconductor wafer is diced along the first dicing line and the second dicing line.
20250098207. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Tomoaki INOKUCHI of Yokoharna Kanagawa JP for kabushiki kaisha toshiba, Tatsuo SHIMIZU of Shinagawa Tokyo JP for kabushiki kaisha toshiba, Yusuke KOBAYASHI of Yokohama Kanagawa JP for kabushiki kaisha toshiba, Shotaro BABA of Kawasai Kanagawa JP for kabushiki kaisha toshiba, Hiro GANGI of Ota Tokyo JP for kabushiki kaisha toshiba, Hiroki NEMOTO of Meguro Tokyo JP for kabushiki kaisha toshiba, Taichi FUKUDA of Yokoharna Kanagawa JP for kabushiki kaisha toshiba, Tatsuya NISHIWAKI of Yokohama Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): H01L29/78, H01L29/06
CPC Code(s): H10D30/635
Abstract: a semiconductor device includes a first conductive part, a second conductive part, a third conductive part, a first insulating part, and a semiconductor part of a first conductivity type. the second conductive part is separated from the first conductive part in a first direction. the third conductive part arranged with a portion of the second conductive part in a second direction crossing the first direction. the first insulating part includes a first insulating region located between the third conductive part and the portion of the second conductive part. the semiconductor part includes a first semiconductor region and a second semiconductor region. the first semiconductor region is located between the first conductive part and the second conductive part. the second semiconductor region is located between the first insulating region and the portion of the second conductive part. the second semiconductor region has a schottky junction with the second conductive part.
20250098210. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Shuhei TOKUYAMA of Nonoichi Ishikawa JP for kabushiki kaisha toshiba
IPC Code(s): H01L29/78, H01L29/40
CPC Code(s): H10D30/668
Abstract: a semiconductor device according to an embodiment includes a first electrode; a first semiconductor region of a first conductivity type provided on the first electrode; a second semiconductor region of a second conductivity type provided on the first semiconductor region; a third semiconductor region of a first conductivity type provided on the second semiconductor region; a second electrode in contact with the second semiconductor region and the third semiconductor region at contact portions; a plurality of field plate electrodes provided in the first semiconductor region via insulating films and extending along a first direction; and a plurality of gate electrodes extending along a second direction different from the first direction. the plurality of gate electrodes have first conductive portions provided in the second semiconductor region via a gate insulating film, and second conductive portions coupled to the first conductive portions and provided on the insulating films.
Inventor(s): Kohei OASA of Tokyo JP for kabushiki kaisha toshiba, Kouta TOMITA of Nonoichi JP for kabushiki kaisha toshiba
IPC Code(s): H01L29/78, H01L21/306, H01L21/425, H01L21/768, H01L29/08, H01L29/40
CPC Code(s): H10D30/668
Abstract: a method for manufacturing a semiconductor device includes forming a trench in a first semiconductor layer of a first conductivity type; filling a first insulating film into the trench; etching the first insulating film to cause an upper surface of the first insulating film to recede lower than an opening of the trench and to expose a sidewall of an upper portion of the trench from under the first insulating film; forming a second-conductivity-type semiconductor region in a region of the first semiconductor layer next to the upper portion of the trench by implanting a second-conductivity-type impurity through the sidewall of the upper portion of the trench into the first semiconductor layer and by diffusing the second-conductivity-type impurity; and forming a gate electrode on the first insulating film in the upper portion of the trench after the forming of the second-conductivity-type semiconductor region.
Inventor(s): Tatsuo SHIMIZU of Shinagawa Tokyo JP for kabushiki kaisha toshiba
IPC Code(s): H01L29/06, H01L21/324, H01L29/16, H01L29/66, H01L29/78
CPC Code(s): H10D62/10
Abstract: a semiconductor device manufacturing method of embodiments includes: forming a trench in a silicon carbide layer having a surface inclined by an angle equal to or more than 0 degrees and equal to or less than 8 degrees with respect to a {0001}face; forming a silicon oxide film on an inner surface of the trench, the atomic concentration of oxygen (o) in the silicon oxide film being less than twice the atomic concentration of silicon (si) in the silicon oxide film; performing a first heat treatment in an atmosphere containing nitrogen oxide gas after forming the silicon oxide film; performing a second heat treatment in an atmosphere containing at least one element selected from a group consisting of hydrogen (h), deuterium (d), and fluorine (f) after the first heat treatment; and forming a gate electrode on the silicon oxide film after the second heat treatment.
20250098233. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Saya SHIMOMURA of Kanazawa Ishikawa JP for kabushiki kaisha toshiba, Hiroaki KATOU of Nonoichi Ishikawa JP for kabushiki kaisha toshiba, Tsuyoshi KACHI of Kanazawa Ishikawa JP for kabushiki kaisha toshiba
IPC Code(s): H01L29/06, H01L29/24, H01L29/78
CPC Code(s): H10D62/103
Abstract: a semiconductor device includes first and second electrodes, a semiconductor part located between the first and second electrodes, a gate electrode located between the semiconductor part and the second electrode, and a structure body extending in the semiconductor part under the gate electrode. the semiconductor part includes first to fifth layers which are stacked in this order. the first to third and fifth layers are of a first conductivity type. the fourth layer is of a second conductivity type. the gate electrode faces the fourth layer. the structure body includes an insulating film, a conductive body, an insulating layer, and a silicide layer. the silicide layer is located at a lower end of the structure body. the lower end of the structure body contacts the second layer. the second layer includes a heavy metal. the third layer has a lower concentration of the heavy metal than the second layer.
20250098234. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Shunsuke KAMIYA of Komatsu Ishikawa JP for kabushiki kaisha toshiba
IPC Code(s): H01L29/06, H01L21/02, H01L21/265, H01L29/66, H01L29/78
CPC Code(s): H10D62/109
Abstract: a semiconductor device according to an embodiment includes: first and second electrodes respectively provided on first and second main surfaces of a semiconductor layer; a first semiconductor region of a first conductivity type; a plurality of insulating regions formed to extend in a second direction orthogonal to a first direction from the second electrode toward the first electrode; a plurality of third electrodes provided in the plurality of insulating regions; a second semiconductor region of a second conductivity type sandwiched between the plurality of insulating regions, formed to extend in the second direction; a third semiconductor region of the first conductivity type located between the second semiconductor region and the first electrode; and a carrier conduction part formed to extend in the second direction in the second semiconductor region and electrically connected to the first electrode via a connection part not penetrating the third semiconductor region.
20250098243. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Yuta SATO of Himeji Hyogo JP for kabushiki kaisha toshiba, Toru SHONO of Himeji Hyogo JP for kabushiki kaisha toshiba, Koji ONISHI of Ibo Hyogo JP for kabushiki kaisha toshiba
IPC Code(s): H01L29/06, H01L29/423
CPC Code(s): H10D62/124
Abstract: according to one embodiment, a semiconductor device includes first and second electrodes, first to third semiconductor regions, a pair of gate electrodes. the pair of gate electrodes are located on the first semiconductor region with gate insulating layers respectively interposed. a distance between the gate insulating layers in a second direction perpendicular to a first direction from the first electrode toward the first semiconductor region is not less than 150 nm and not more than 450 nm. the second semiconductor region is located between the pair of gate electrodes. the second electrode includes a contact part contacting the third semiconductor region and a portion of the second semiconductor region in the second direction. a length in the second direction of a bottom portion of the contact part is greater than 28 nm and not more than 206 nm.
Inventor(s): Yuichiro SASAKI of Nonoichi Ishikawa JP for kabushiki kaisha toshiba
IPC Code(s): H01L29/08, H01L21/265, H01L29/417, H01L29/66, H01L29/78
CPC Code(s): H10D62/153
Abstract: according to one embodiment, a semiconductor device includes a first electrode, a first semiconductor region of a first conductivity type, a gate electrode, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, and a second electrode. the gate electrode is located on the first semiconductor region with a gate insulating layer interposed. the second semiconductor region faces the gate electrode via the gate insulating layer. the second semiconductor region includes: a first portion; a second portion located on the first portion and having a higher second-conductivity-type impurity concentration than the first portion; and a third portion positioned between the second portion and the gate electrode and having a higher concentration of a first element than the second portion. the first element is at least one selected from the group consisting of carbon, germanium, antimony, and indium.
Inventor(s): Tatsuo SHIMIZU of Shinagawa JP for kabushiki kaisha toshiba
IPC Code(s): H01L29/16, H01L29/36, H01L29/66
CPC Code(s): H10D62/8325
Abstract: a semiconductor device of embodiments includes: a silicon carbide layer having a first face having an off-angle of 0� or more and 8� or less with respect to a {0001} face and a second face opposite to the first face, having a 4h-sic crystal structure, and including a first silicon carbide region of p-type, a second silicon carbide region of n-type between the first silicon carbide region and the first face, and a third silicon carbide region between the first silicon carbide region and the first face and containing oxygen, the second silicon carbide region disposed between the third silicon carbide region and the first face; a gate electrode; a silicon oxide layer between the silicon carbide layer and the gate electrode; and a region disposed between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration of 1�10cmor more.
20250098262. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Kouta TOMITA of Nonoichi Ishikawa JP for kabushiki kaisha toshiba
IPC Code(s): H01L29/40, H01L29/06, H01L29/78
CPC Code(s): H10D64/117
Abstract: a semiconductor device includes a first electrode, a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a second electrode, a third electrode, and a fourth electrode. the third electrode is arranged along a boundary between adjacent regions of the plurality of regions. the third electrode is not located at a portion of the boundary most distant to the second electrode. the third electrode faces the second semiconductor layer via an insulating body. the fourth electrode is located on the third semiconductor layer. the fourth electrode is connected to the second semiconductor layer, the third semiconductor layer, and the second electrode. a portion of the fourth electrode located at the most distant portion has a schottky barrier junction with the first semiconductor layer.
20250098263. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Tomoaki INOKUCHI of Yokohama JP for kabushiki kaisha toshiba, Hiro GANGI of Tokyo JP for kabushiki kaisha toshiba, Yusuke KOBAYASHI of Yokohama JP for kabushiki kaisha toshiba, Shotaro BABA of Kawasaki JP for kabushiki kaisha toshiba, Taichi FUKUDA of Yokohama JP for kabushiki kaisha toshiba
IPC Code(s): H01L29/40, H01L27/06, H01L29/06, H01L29/47, H01L29/78, H10B63/00, H10N70/00
CPC Code(s): H10D64/117
Abstract: a semiconductor device includes a major element including a first semiconductor region, a first electrode, a second electrode, a first gate electrode, and a first insulating member being positioned between the first gate electrode and the first semiconductor region, a gate driver supplying the gate voltage to the first gate electrode, and a recording element electrically connected with the gate driver. the recording element records, as continuously changing analog data, a number of times that the gate voltage is supplied to the first gate electrode while being enough to switch the major element on.
20250098284. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Hiroki NEMOTO of Fuchu Tokyo JP for kabushiki kaisha toshiba, Tsuyoshi KACHI of Kanazawa Ishikawa JP for kabushiki kaisha toshiba, Hiroaki KATOU of Nonoichi Ishikawa JP for kabushiki kaisha toshiba
IPC Code(s): H01L29/78, H01L29/10, H01L29/40, H01L29/47, H01L29/49, H01L29/66
CPC Code(s): H10D84/146
Abstract: a semiconductor device includes a semiconductor layer having first and second surfaces and including a first semiconductor region of a first type, first and second electrodes, a first insulation region, a first conductive portion electrically connected to the first electrode, a second insulation region, a first control electrode in the second insulation region, a second semiconductor region of the first type between the first and second insulation regions, a second conductive portion adjacent to the second semiconductor region and forming a schottky junction with the second semiconductor region, a third semiconductor region of a second type on the first semiconductor region, and a fourth semiconductor region of the first type between the third semiconductor region and the first electrode. the third and fourth semiconductor regions are electrically connected to the first electrode.
20250098289. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Yusuke KOBAYASHI of Yokohama JP for kabushiki kaisha toshiba, Tomoaki INOKUCHI of Yokohama JP for kabushiki kaisha toshiba, Tatsunori SAKANO of Tokyo JP for kabushiki kaisha toshiba, Satoshi YOSHIDA of Kawasaki JP for kabushiki kaisha toshiba, Kento ADACHI of Tokyo JP for kabushiki kaisha toshiba, Hiro GANGI of Tokyo JP for kabushiki kaisha toshiba, Shotaro BABA of Kawasaki JP for kabushiki kaisha toshiba, Taichi FUKUDA of Yokohama JP for kabushiki kaisha toshiba
IPC Code(s): H01L27/06, H01L23/00, H01L29/40, H01L29/78
CPC Code(s): H10D84/811
Abstract: an embodiment includes a transistor section, a gate electrode pad, a gate connection member, a gate circuit section, and a casing. the transistor section includes a drain electrode, a source electrode and a gate electrode. the transistor section and the gate electrode pad are provided on a semiconductor substrate. the gate connection member connects a gate terminal and the gate electrode pad. the gate circuit section connects the gate electrode pad and the gate electrode, and includes a parallel circuit with a capacitor and a resistive element, a first connection member electrically connecting the capacitor to the gate electrode pad and a second connection member electrically connecting the capacitor to the gate electrode. the casing accommodates the transistor section, the gate electrode pad and the gate circuit section.
20250098298. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Tomoaki INOKUCHI of Yokohama JP for kabushiki kaisha toshiba, Hiro GANGI of Tokyo JP for kabushiki kaisha toshiba, Yusuke KOBAYASHI of Yokohama JP for kabushiki kaisha toshiba, Tatsunori SAKANO of Tokyo JP for kabushiki kaisha toshiba, Tatsuo SHIMIZU of Tokyo JP for kabushiki kaisha toshiba, Shotaro BABA of Kawasaki JP for kabushiki kaisha toshiba, Taichi FUKUDA of Yokohama JP for kabushiki kaisha toshiba
IPC Code(s): H01L27/12, H01L27/02, H01L29/40, H01L29/47, H01L29/812
CPC Code(s): H10D86/201
Abstract: the major element includes a first electrode, a second electrode, a first semiconductor layer located between the first electrode and the second electrode, the first semiconductor layer forming a first schottky junction with the second electrode, and a first gate electrode facing the first schottky junction. the control element includes a third electrode, a fourth electrode, a second semiconductor layer located between the third electrode and the fourth electrode, the second semiconductor layer forming a second schottky junction with the fourth electrode, and a second gate electrode facing the second schottky junction.
20250098340. LIGHT-RECEIVING DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Yoshiaki SUGIZAKI of Fujisawa Kanagawa JP for kabushiki kaisha toshiba, Yasutaka NISHIDA of Tama Tokyo JP for kabushiki kaisha toshiba, Takashi YOSHIDA of Kashiwa Chiba JP for kabushiki kaisha toshiba, Akiko YUZAWA of Minato Tokyo JP for kabushiki kaisha toshiba, Miyu NAGAI of Yokohama Kanagawa JP for kabushiki kaisha toshiba
IPC Code(s): H01L31/113, H01L31/02, H01L31/028, H01L31/0384
CPC Code(s): H10F30/282
Abstract: a light-receiving device includes graphene including a light-receiving part; major electrodes electrically connected with the graphene, the major electrodes including a source electrode and a drain electrode, the light-receiving part being positioned between the source electrode and the drain electrode; a gate electrode electrically connected with the light-receiving part of the graphene via capacitive coupling; a circuit part electrically connected with the major electrode and the gate electrode; and an ionic substance contacting the light-receiving part of the graphene. the ionic substance is one of an anion having an acid dissociation constant of not less than 3 or a cation having an acid dissociation constant of not more than 11.
KABUSHIKI KAISHA TOSHIBA patent applications on March 20th, 2025
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- B01D53/14
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- B61L27/14
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- H01L21/306
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- H01L29/16
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- H01L27/12
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- H01L31/02
- H01L31/028
- H01L31/0384
- CPC H10F30/282