Intel corporation (20250117060). PROCESSOR POWER MANAGEMENT
PROCESSOR POWER MANAGEMENT
Organization Name
Inventor(s)
Altug Koker of El Dorado Hills CA US
Abhishek R. Appu of El Dorado Hills CA US
Kiran C. Veernapu of Bangalore IN
Prasoonkumar Surti of Folsom CA US
Eric J. Hoekstra of Folsom CA US
Nikos Kaburlasos of Folsom CA US
Bhushan M. Borole of Rancho Cordova CA US
Travis T. Schluessler of Berthoud CO US
Jonathan Kennedy of Bristol GB
PROCESSOR POWER MANAGEMENT
This abstract first appeared for US patent application 20250117060 titled 'PROCESSOR POWER MANAGEMENT
Original Abstract Submitted
methods and apparatus relating to techniques for avoiding cache lookup for cold cache. in an example, an apparatus comprises logic, at least partially comprising hardware logic, to collect user information for a user of a data processing device, generate a user profile for the user of the data processing device from the user information, and set a power profile a processor in the data processing device using the user profile. other embodiments are also disclosed and claimed.
- Intel corporation
- Altug Koker of El Dorado Hills CA US
- Abhishek R. Appu of El Dorado Hills CA US
- Kiran C. Veernapu of Bangalore IN
- Joydeep Ray of Folsom CA US
- Balaji Vembu of Folsom CA US
- Prasoonkumar Surti of Folsom CA US
- Kamal Sinha of Folsom CA US
- Eric J. Hoekstra of Folsom CA US
- Wenyin Fu of Folsom CA US
- Nikos Kaburlasos of Folsom CA US
- Bhushan M. Borole of Rancho Cordova CA US
- Travis T. Schluessler of Berthoud CO US
- Ankur N. Shah of Folsom CA US
- Jonathan Kennedy of Bristol GB
- G06F1/26
- G06F12/0875
- CPC G06F1/3209