Intel corporation (20240403620). MACHINE LEARNING ACCELERATOR MECHANISM
MACHINE LEARNING ACCELERATOR MECHANISM
Organization Name
Inventor(s)
Amit Bleiweiss of Yad Binyamin (IL)
Anavai Ramesh of Chandler AZ (US)
Asit Mishra of Hillsboro OR (US)
Deborah Marr of Portland OR (US)
Jeffrey Cook of Portland OR (US)
Srinivas Sridharan of Bangalore (IN)
Eriko Nurvitadhi of Hillsboro OR (US)
Elmoustapha Ould-ahmed-vall of Chandler AZ (US)
Dheevatsa Mudigere of Bangalore (IN)
Mohammad Ashraf Bhuiyan of Beaverton OR (US)
Md Faijul Amin of Chandler AZ (US)
Dhawal Srivastava of Scottsdale AZ (US)
Niharika Maheshwari of Santa Clara CA (US)
MACHINE LEARNING ACCELERATOR MECHANISM
This abstract first appeared for US patent application 20240403620 titled 'MACHINE LEARNING ACCELERATOR MECHANISM
Original Abstract Submitted
an apparatus to facilitate acceleration of machine learning operations is disclosed. the apparatus comprises at least one processor to perform operations to implement a neural network and accelerator logic to perform communicatively coupled to the processor to perform compute operations for the neural network.
- Intel corporation
- Amit Bleiweiss of Yad Binyamin (IL)
- Anavai Ramesh of Chandler AZ (US)
- Asit Mishra of Hillsboro OR (US)
- Deborah Marr of Portland OR (US)
- Jeffrey Cook of Portland OR (US)
- Srinivas Sridharan of Bangalore (IN)
- Eriko Nurvitadhi of Hillsboro OR (US)
- Elmoustapha Ould-ahmed-vall of Chandler AZ (US)
- Dheevatsa Mudigere of Bangalore (IN)
- Mohammad Ashraf Bhuiyan of Beaverton OR (US)
- Md Faijul Amin of Chandler AZ (US)
- Wei Wang of San Jose CA (US)
- Dhawal Srivastava of Scottsdale AZ (US)
- Niharika Maheshwari of Santa Clara CA (US)
- G06N3/063
- G06F7/78
- G06F9/00
- G06N3/084
- G06N20/00
- G06T1/20
- CPC G06N3/063