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Deepmind technologies limited (20250094679). LOW-LEVEL FEEDBACK-GUIDED SCHEDULING FOR HIGH-LEVEL SYNTHESIS

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LOW-LEVEL FEEDBACK-GUIDED SCHEDULING FOR HIGH-LEVEL SYNTHESIS

Organization Name

deepmind technologies limited

Inventor(s)

Zhigang Pan of Austin TX US

Hanchen Ye of Sunnyvale CA US

Xiaoqing Xu of Mountain View CA US

Christopher Daniel Leary of Sunnyvale CA US

LOW-LEVEL FEEDBACK-GUIDED SCHEDULING FOR HIGH-LEVEL SYNTHESIS

This abstract first appeared for US patent application 20250094679 titled 'LOW-LEVEL FEEDBACK-GUIDED SCHEDULING FOR HIGH-LEVEL SYNTHESIS

Original Abstract Submitted

the technology employs an iterative system of difference constraints (isdc) approach that leverages low-level feedback from downstream tools to iteratively refine scheduling with respect to circuit design high-level synthesis. in each iteration, a number of subgraphs are extracted from an original computation graph and passed to selected downstream tools, e.g., for logic synthesis, placement and/or routing. the downstream tools' compilation results are extracted and fed back to a scheduler. with the feedback, the scheduler recalculates delay estimation between each pair of nodes in the original computation graph and prunes redundant scheduling constraints. as a result, the explorable design space is enlarged in the next iteration, leading to refined scheduling results. this feedback-guided approach is compatible with versatile design constraints and objectives, such as minimizing register usage given a targeted clock period, minimizing the clock period given a constrained area budget, etc., to provide improvements to the system operation.