Category:Jhon-Jhy LIAW

Jhon-Jhy LIAW

Executive Summary

Jhon-Jhy LIAW is an inventor who has filed 18 patents. Their primary areas of innovation include No explanation available (7 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (6 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (6 patents), and they have worked with companies such as Taiwan Semiconductor Manufacturing Company, Ltd. (17 patents), TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (1 patents). Their most frequent collaborators include (2 collaborations), (2 collaborations), (2 collaborations).

Patent Filing Activity

Technology Areas

List of Technology Areas

• H10D30/6735 (No explanation available): 7 patents
• H01L29/775 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 6 patents
• H01L29/0673 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 6 patents
• H01L29/42392 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 6 patents
• H10D30/43 (No explanation available): 6 patents
• H10D30/6757 (No explanation available): 6 patents
• H10D30/014 (No explanation available): 5 patents
• H10D62/121 (No explanation available): 5 patents
• H10D64/017 (No explanation available): 5 patents
• H01L29/66439 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
• H01L29/66545 ({using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate}): 4 patents
• H10B10/12 (ELECTRONIC MEMORY DEVICES): 4 patents
• H10D84/038 (No explanation available): 3 patents
• H01L27/092 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L29/0847 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L29/66553 ({using self aligned silicidation, i.e. salicide (formation of conductive layers comprising silicides): 2 patents
• G11C11/412 (using field-effect transistors only): 2 patents
• H10B10/125 (ELECTRONIC MEMORY DEVICES): 2 patents
• H10D30/031 (No explanation available): 2 patents
• H10D64/018 (No explanation available): 2 patents
• H10D84/017 (No explanation available): 2 patents
• H01L21/823807 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 2 patents
• H01L21/823878 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 2 patents
• H10D62/151 (No explanation available): 2 patents
• H01L21/823814 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 2 patents
• H01L29/78696 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H10D62/116 (No explanation available): 1 patents
• H10D84/859 (No explanation available): 1 patents
• H01L21/823475 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
• H01L21/823481 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
• H01L27/088 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L29/41775 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H10D64/256 (No explanation available): 1 patents
• H01L23/5286 ({Geometry or} layout of the interconnection structure {(): 1 patents
• H10D84/85 (No explanation available): 1 patents
• H01L21/823871 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
• H01L27/11807 (Masterslice integrated circuits): 1 patents
• H01L27/0924 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L29/1037 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L29/1608 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L29/165 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L29/167 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L29/24 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L29/267 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L29/7848 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2027/11824 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2027/11831 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2027/11838 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H10B10/18 (ELECTRONIC MEMORY DEVICES): 1 patents
• H01L21/823842 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
• H10D62/118 (No explanation available): 1 patents
• H10D84/0128 (No explanation available): 1 patents
• H10D84/013 (No explanation available): 1 patents
• H10D84/83 (No explanation available): 1 patents
• H01L27/1207 ({combined with devices in contact with the semiconductor body, i.e. bulk/SOI hybrid circuits}): 1 patents
• H01L21/84 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H10D30/024 (No explanation available): 1 patents
• H10D30/6211 (No explanation available): 1 patents
• H10D84/0167 (No explanation available): 1 patents
• H10D84/0193 (No explanation available): 1 patents
• H10D84/853 (No explanation available): 1 patents

Companies

List of Companies

• Taiwan Semiconductor Manufacturing Company, Ltd.: 17 patents
• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.: 1 patents

Collaborators

• Ta-Chun LIN (2 collaborations)
• Yu-Lung TUNG (2 collaborations)
• Xiaodong WANG (2 collaborations)
• Hsin-Che CHIANG (2 collaborations)
• Wei-Chih KAO (2 collaborations)
• Jeng-Ya YEH (2 collaborations)
• Mu-Chi CHIANG (2 collaborations)
• Ju-Li HUANG (1 collaborations)
• Dian-Sheng YU (1 collaborations)
• Kuo-Hua PAN (1 collaborations)
• Chia-He CHUNG (1 collaborations)
• Wei-Chih HOU (1 collaborations)
• Feng-Ming CHANG (1 collaborations)
• Chun-Jun LIN (1 collaborations)
• Kao-Ting LAI (1 collaborations)
• Yi-Ren CHEN (1 collaborations)
• Shih-Hsun CHANG (1 collaborations)
• Chi-Wei WU (1 collaborations)
• Pang-Hsuan LIU (1 collaborations)