Category:Brian Cronquist of Klamath Falls OR (US)
Appearance
Brian Cronquist of Klamath Falls OR (US)
Executive Summary
Brian Cronquist of Klamath Falls OR (US) is an inventor who has filed 7 patents. Their primary areas of innovation include ELECTRONIC MEMORY DEVICES (4 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (4 patents), {Making of internal connections, substrate contacts} (4 patents), and they have worked with companies such as Monolithic 3D Inc. (7 patents). Their most frequent collaborators include (7 collaborations), (2 collaborations), (2 collaborations).
Patent Filing Activity
Technology Areas
List of Technology Areas
- H10B43/20 (ELECTRONIC MEMORY DEVICES): 4 patents
- H01L25/0657 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
- H01L21/743 ({Making of internal connections, substrate contacts}): 4 patents
- H01L21/76898 ({formed through a semiconductor substrate}): 4 patents
- H01L23/481 (Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements {; Selection of materials therefor}): 4 patents
- H01L2924/12032 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
- H01L2924/13091 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
- H10B43/40 (ELECTRONIC MEMORY DEVICES): 3 patents
- H01L25/50 ({Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group): 3 patents
- H01L2924/12042 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L21/76254 (Dielectric regions {, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers}): 3 patents
- H10B10/00 (Static random access memory [SRAM] devices): 3 patents
- H10B10/125 (ELECTRONIC MEMORY DEVICES): 3 patents
- H10B12/053 (ELECTRONIC MEMORY DEVICES): 3 patents
- H10B12/09 (ELECTRONIC MEMORY DEVICES): 3 patents
- H10B12/50 (ELECTRONIC MEMORY DEVICES): 3 patents
- H10B20/00 (Read-only memory [ROM] devices): 3 patents
- H10B41/20 (ELECTRONIC MEMORY DEVICES): 3 patents
- H01L2223/5442 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L2223/54426 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L2224/16145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L2224/32145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L2224/32225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L2224/45124 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L2224/45147 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L2224/48091 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L2224/48227 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L2224/73204 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L2224/73253 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L2224/73265 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L2924/00011 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L2924/10253 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L2924/1301 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L2924/1305 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L2924/13062 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L2924/14 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L2924/15311 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L2924/181 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L2924/3011 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L2924/3025 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L27/0688 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L29/66621 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L27/092 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L29/4236 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L29/78 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L21/6835 ({using temporarily an auxiliary support}): 2 patents
- G11C8/16 (Multiple access memory array, e.g. addressing one storage element via at least two independent addressing line groups): 2 patents
- H01L23/5252 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H10B12/20 (ELECTRONIC MEMORY DEVICES): 2 patents
- H10B20/25 (One-time programmable ROM [OTPROM] devices, e.g. using electrically-fusible links): 2 patents
- H10B41/40 (ELECTRONIC MEMORY DEVICES): 2 patents
- H10B41/41 (ELECTRONIC MEMORY DEVICES): 2 patents
- H01L23/3677 (Cooling facilitated by shape of device {(): 2 patents
- H01L24/13 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L24/16 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L24/45 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L24/48 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L25/0655 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2221/68368 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2224/131 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2224/16146 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2224/16227 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2224/16235 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2224/81005 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2224/83894 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2225/06513 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2225/06541 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2924/01002 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2924/01004 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2924/01013 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2924/01018 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2924/01019 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2924/01029 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2924/01046 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2924/01066 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2924/01068 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2924/01077 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2924/01078 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2924/01322 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2924/10329 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2924/12033 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2924/12036 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2924/1461 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2924/1579 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2924/16152 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2924/19041 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2924/30105 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H10B12/05 (ELECTRONIC MEMORY DEVICES): 2 patents
- H10D10/051 (No explanation available): 2 patents
- H10D30/0512 (No explanation available): 2 patents
- H10D64/027 (No explanation available): 2 patents
- H10D84/038 (No explanation available): 2 patents
- H10D84/85 (No explanation available): 2 patents
- H10D84/907 (No explanation available): 2 patents
- H10D84/998 (No explanation available): 2 patents
- H10D86/01 (No explanation available): 2 patents
- H10D86/201 (No explanation available): 2 patents
- H10D88/00 (No explanation available): 2 patents
- H10D88/01 (No explanation available): 2 patents
- H10D89/10 (No explanation available): 2 patents
- H10B43/30 (ELECTRONIC MEMORY DEVICES): 1 patents
- H10B43/50 (ELECTRONIC MEMORY DEVICES): 1 patents
- H01L23/485 (consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts {(): 1 patents
- H01L23/522 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L24/25 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L27/088 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/24146 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2225/06544 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2225/06589 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2924/0002 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2924/01104 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2924/2064 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2924/351 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L21/8221 ({Three dimensional integrated circuits stacked in different levels}): 1 patents
- H01L21/823828 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
- H01L21/84 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L27/0207 ({Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique}): 1 patents
- H01L27/11807 (Masterslice integrated circuits): 1 patents
- H01L27/11898 (Masterslice integrated circuits): 1 patents
- H01L27/1203 ({the substrate comprising an insulating body on a semiconductor body, e.g. SOI (three-dimensional layout): 1 patents
- H01L29/66272 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L29/66825 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L29/66833 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L29/66901 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L29/7841 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L29/7843 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L29/7881 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L29/792 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L27/1214 (the substrate being other than a semiconductor body, e.g. an insulating body): 1 patents
- H01L27/1266 (the substrate being other than a semiconductor body, e.g. an insulating body): 1 patents
- H10D30/0411 (No explanation available): 1 patents
- H10D30/0413 (No explanation available): 1 patents
- H10D30/60 (No explanation available): 1 patents
- H10D30/681 (No explanation available): 1 patents
- H10D30/69 (No explanation available): 1 patents
- H10D30/711 (No explanation available): 1 patents
- H10D30/792 (No explanation available): 1 patents
- H10D64/513 (No explanation available): 1 patents
- H10D84/0172 (No explanation available): 1 patents
- H10D86/0214 (No explanation available): 1 patents
- H10D86/40 (No explanation available): 1 patents
- H10D86/60 (No explanation available): 1 patents
- H10B80/00 (Assemblies of multiple devices comprising at least one memory device covered by this subclass): 1 patents
- H01L24/08 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L25/18 (the devices being of types provided for in two or more different subgroups of the same main group of groups): 1 patents
- H01L2224/08145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2924/1437 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2924/14511 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- G03F9/7076 ({for microlithography (measuring printed patterns for monitoring overlay): 1 patents
- G03F9/7084 ({for microlithography (measuring printed patterns for monitoring overlay): 1 patents
- H01L23/367 (Cooling facilitated by shape of device {(): 1 patents
- H01L23/5226 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L23/528 ({Geometry or} layout of the interconnection structure {(): 1 patents
- H01L23/53214 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L23/53228 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L23/544 (Marks applied to semiconductor devices {or parts}, e.g. registration marks, {alignment structures, wafer maps (test patterns for characterising or monitoring manufacturing processes): 1 patents
- H10D10/40 (No explanation available): 1 patents
- H10D30/061 (No explanation available): 1 patents
- H10D30/6727 (No explanation available): 1 patents
- H10D30/6728 (No explanation available): 1 patents
- H10D30/6733 (No explanation available): 1 patents
- H10D30/6735 (No explanation available): 1 patents
- H10D30/6737 (No explanation available): 1 patents
- H10D30/6743 (No explanation available): 1 patents
- H10D30/83 (No explanation available): 1 patents
- H10D30/87 (No explanation available): 1 patents
- H10D62/83 (No explanation available): 1 patents
- H10D84/0186 (No explanation available): 1 patents
- H01L21/268 (Bombardment with radiation {(): 1 patents
- H01L24/73 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2223/54453 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/16225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H10D64/017 (No explanation available): 1 patents
- H10D84/83 (No explanation available): 1 patents
Companies
List of Companies
- Monolithic 3D Inc.: 7 patents
Collaborators
- Zvi Or-Bach (7 collaborations)
- Jin-Woo Han of San Jose CA (US) (2 collaborations)
- Deepak C. Sekar of Sunnyvale CA (US) (2 collaborations)
- Eli Lusky (1 collaborations)
- Deepak Sekar of Sunnyvale CA (US) (1 collaborations)
Subcategories
This category has the following 6 subcategories, out of 6 total.