Apple inc. (20250103551). Interleave Execution Circuit
Interleave Execution Circuit
Organization Name
Inventor(s)
Kanghong Yan of Santa Clara CA US
Rajdeep L. Bhuyar of San Jose CA US
Ran Aharon Chachick of Seattle WA US
Interleave Execution Circuit
This abstract first appeared for US patent application 20250103551 titled 'Interleave Execution Circuit
Original Abstract Submitted
techniques are disclosed involving interleaving and de-interleaving of operands. an embodiment of an apparatus includes an array storage circuit and a control circuit. the array storage circuit is configured to store elements of an array having a plurality of rows and a plurality of columns. the control circuit is configured to write multiple input vectors to the array storage circuit such that elements of a given input vector are split among multiple columns of the plurality of columns and a given row of the plurality of rows has interleaved elements of the multiple input vectors. the control circuit is further configured to output data corresponding to rows of the array to form one or more result values.
