Apple inc. (20250103122). Hardware Performance Information for Power Management
Hardware Performance Information for Power Management
Organization Name
Inventor(s)
Angel E. Socarras of Orlando FL US
Ben D. Jarrett of Austin TX US
Jason P. Jane of Morgan Hill CA US
Thomas B. Pringle of Winter Park FL US
Jackson Dsouza of Fremont CA US
Hardware Performance Information for Power Management
This abstract first appeared for US patent application 20250103122 titled 'Hardware Performance Information for Power Management
Original Abstract Submitted
techniques are disclosed relating to power management in a processing circuit that includes a set of functional blocks and performance counter registers configured to store utilization values indicative of utilization of associated ones of the set of functional blocks. a register interface circuit is configured to periodically sample the processing circuit to obtain aggregated utilization values generated from utilization values stored in the performance counter registers and write the aggregated utilization values to the set of trace buffer. a power management processor is configured to utilize a set of information stored in the set of trace buffers to determine whether to change a performance state of the processing circuit, the set of information including time-domain and frequency-domain representations of utilization of the processing circuit. in other embodiments, a functional block that is a hardware limiter of the processing circuit may be determined.