Apple inc. (20250096836). Bias Point Selection Circuitry for Improved Linearity
Bias Point Selection Circuitry for Improved Linearity
Organization Name
Inventor(s)
Nitesh Singhal of Santa Clara CA US
Mark G. Forbes of San Carlos CA US
Abbas Komijani of Mountain View CA US
Jong Seok Park of San Diego CA US
Youngchang Yoon of San Diego CA US
Georgios Palaskas of San Diego CA US
Bias Point Selection Circuitry for Improved Linearity
This abstract first appeared for US patent application 20250096836 titled 'Bias Point Selection Circuitry for Improved Linearity
Original Abstract Submitted
wireless circuitry is provided that includes a radio-frequency circuit having an input transistor and bias point selection circuitry configured to determine an optimal bias voltage for the input transistor. the bias point selection circuitry may include a replica transistor, a voltage generator configured to output one or more voltage levels to a gate terminal of the replica transistor, a current-to-voltage converter coupled to a source-drain terminal of the replica transistor, an analog-to-digital converter configured to receive analog voltages from the current-to-voltage converter and to output corresponding digital codes based on the received analog voltages, and associated control circuitry configured to receive the digital codes from the analog-to-digital converter and to adjust the voltage generator to output the optimal bias voltage based on the digital codes. the optimal bias voltage produces a third order transconductance of zero for the input transistor, which results in improved linearity for the radio-frequency circuit.