Apple inc. (20250093926). Adaptive On-Chip Digital Power Estimator
Adaptive On-Chip Digital Power Estimator
Organization Name
Inventor(s)
Laurent F. Chaouat of Jonestown TX US
Saharsh Samir Oza of Austin TX US
Adaptive On-Chip Digital Power Estimator
This abstract first appeared for US patent application 20250093926 titled 'Adaptive On-Chip Digital Power Estimator
Original Abstract Submitted
systems, apparatuses, and methods for implementing a dynamic power estimation (dpe) unit that adapts weights in real-time are described. a system includes a processor, a dpe unit, and a power management unit (pmu). the dpe unit generates a power consumption estimate for the processor by multiplying a plurality of weights by a plurality of counter values, with each weight multiplied by a corresponding counter. the dpe unit calculates the sum of the products of the plurality of weights and plurality of counters. the accumulated sum is used as an estimate of the processor's power consumption. on a periodic basis, the estimate is compared to a current sense value to measure the error. if the error is greater than a threshold, then an on-chip learning algorithm dynamically adjust the weights. the pmu uses the power consumption estimates to keep the processor within a thermal envelope.
