Radio-frequency Power Detector with Transimpedance Amplifier and Input Offset Mitigation

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Radio-frequency Power Detector with Transimpedance Amplifier and Input Offset Mitigation

This abstract first appeared for US patent application 20240410922 titled 'Radio-frequency Power Detector with Transimpedance Amplifier and Input Offset Mitigation

Original Abstract Submitted

wireless circuitry is provided that includes a radio-frequency amplifier or mixer, a power detector coupled to an input or an output of the radio-frequency amplifier or mixer, and a transimpedance amplifier coupled to an output of the power detector. the transimpedance amplifier can be implemented as a class a amplifier, a class ab amplifier, or an enhanced class ab amplifier. the power detector can include an input transistor having a gate terminal configured to receive a radio-frequency signal, a bias transistor, and a voltage generator configured to apply a calibration voltage to a gate terminal of the bias transistor to mitigate a direct current (dc) offset associated with the power detector.