Amazon technologies, inc. (20250007548). JOINT RECEIVER ARCHITECTURE FOR SUB-GIGAHERTZ RECEIVER
JOINT RECEIVER ARCHITECTURE FOR SUB-GIGAHERTZ RECEIVER
Organization Name
Inventor(s)
Ravi Ichapurapu of Morgan Hill CA US
JOINT RECEIVER ARCHITECTURE FOR SUB-GIGAHERTZ RECEIVER
This abstract first appeared for US patent application 20250007548 titled 'JOINT RECEIVER ARCHITECTURE FOR SUB-GIGAHERTZ RECEIVER
Original Abstract Submitted
technologies directed to reducing switching latency between different modulation schemes are described. one sub-gigahertz (sub-ghz) receiver includes radio frequency (rf) circuitry, an analog-to-digital converter (adc), a first module, and a second module. the adc can generate in-phase and quadrature samples (iq samples) representing an rf signal received by the sub-ghz receiver. the first module can demodulate the iq samples according to a first modulation scheme, and the second module can demodulate the iq samples according to a second modulation scheme different from the first modulation scheme. the first module and the second module can concurrently demodulate the iq samples.