Advanced micro devices, inc. (20250004652). LOW POWER MEMORY STATE DURING NON-IDLE PROCESSOR STATE
LOW POWER MEMORY STATE DURING NON-IDLE PROCESSOR STATE
Organization Name
Inventor(s)
Benjamin Tsien of Santa Clara CA US
Chintan S. Patel of Austin TX US
Guhan Krishnan of Boxborough MA US
LOW POWER MEMORY STATE DURING NON-IDLE PROCESSOR STATE
This abstract first appeared for US patent application 20250004652 titled 'LOW POWER MEMORY STATE DURING NON-IDLE PROCESSOR STATE
Original Abstract Submitted
the disclosed device includes multiple processing component, and a cache. one of the processing components can be instructed to avoid allocating to the cache and another of the processing components can be allowed use the cache while reducing accessing a memory. the memory can then enter a low power state in response to an idle state of the memory from the processing components avoiding accessing the memory for a period of time. various other methods, systems, and computer-readable media are also disclosed.