POWER SEMICONDUCTOR DEVICE INTEGRATED SELECTABLE GATE RESISTANCE

Abstract: a power semiconductor device is provided that includes paralleled transistor cells, and a common source, a common drain and a common gate operatively coupled to the paralleled transistor cells. the power semiconductor device also includes a plurality of common gate contact pads operatively coupled to the common gate, and one or more resistors coupled to respective one or more common gate contact pads of the plurality of common gate contact pads. the one or more resistors are also coupled between the respective one or more common gate contact pads and the common gate. the plurality of common gate contact pads provide a selectable resistive decoupling of the common gate by connection of one of the plurality of common gate contact pads.

Inventor(s): Perry Schugart

CPC Classification: H10D62/127 (No explanation available)

Search for rejections for patent application number 20250234609