EMBEDDED MEMORY DEVICE

Abstract: in some embodiments, the present disclosure relates to an integrated chip structure. the integrated chip structure includes a first doped region and a second doped region disposed within a substrate. a data storage structure is arranged over the substrate and laterally between the first doped region and the second doped region. an isolation structure is arranged within the substrate along a first side of the data storage structure. the first doped region is laterally between the isolation structure and the data storage structure. a remnant is arranged over and along a sidewall of the isolation structure. the remnant includes a first material having a vertically extending segment and a horizontally extending segment protruding outward from a sidewall of the vertically extending segment.

Inventor(s): Wei Cheng Wu, Pai Chi Chou

CPC Classification: H10B51/30 (ELECTRONIC MEMORY DEVICES)

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