MULTI-DATAPATH SUPPORT FOR LOW LATENCY TRAFFIC MANAGER

Abstract: techniques as described herein may be implemented to support processing ct and saf traffic. a common packet data buffer is allocated to store incoming ct and saf packet data. saf packet control data are directed onto a control data path with first processing engines, to arrive at a scheduler with a first latency. ct packet control data are directed onto a second control data path to arrive at the scheduler with a second latency less than the first latency after processing in the second control path by second processing engines bypassing a subset of the first processing engines. ct and saf packet dequeue requests are generated for ct and saf packets, respectively, using the ct and saf packet control data and merged into a merged sequence of dequeue requests to retrieve corresponding packet data from the common packet data buffer based on the merged sequence of dequeue requests.

Inventor(s): Viraj Milind ATHAVALE, Srinivasan DK, Ashwin ALAPATI, William Brad MATTHEWS, Ajit Kumar JAIN

CPC Classification: H04L47/626 ({channel conditions})

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