20250233088. Vertical Power Delivery S (Intel)
VERTICAL POWER DELIVERY IN SPACE-CONSTRAINED SYSTEM-ON-PACKAGE
Abstract: embodiments herein relate to a semiconductor device which includes one or more voltage regulator (vr) chiplets coupled to a package interposer, where the package interposer includes coaxial magnetic composite core inductors to provide power to one or more load die. in one possible configuration, the one or more vr chiplets are coupled to the bottom side of the package interposer, the bottom side of the package interposer is coupled to the top side of a motherboard, and the one or more load die are coupled to the top side of the package interposer. in another possible configuration, the one or more vr chiplets are coupled to the bottom side of the package interposer, the top side of the package interposer is coupled to the bottom side of a motherboard and the one or more load die are coupled to the top side of the motherboard.
Inventor(s): Rinkle Jain, Christopher Schaef, Rajiv Kaushal, Shunjiang Xu, Jonathan Douglas
CPC Classification: H01L23/645 ({Inductive arrangements (, take precedence)})
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