20250233015. Methods Manufacturi (Applied Materials, .)
METHODS OF MANUFACTURING INTERCONNECT STRUCTURES
Abstract: methods of manufacturing interconnect structures as part of a microelectronic device fabrication process are described. the methods include forming a dielectric layer including at least one feature defining a gap having sidewalls and a bottom on a substrate. the methods further include forming a blocking layer on the bottom by exposing the substrate to a blocking compound; selectively depositing a barrier layer on the sidewalls; selectively depositing a metal liner on the barrier layer on the sidewalls; removing the blocking layer; and performing a gap fill process to fill the gap with a gapfill material.
Inventor(s): Bhaskar Jyoti Bhuyan, Lisa J. Enman, Feng Q. Liu, Jeffrey W. Anthis, Mark Saly, Lakmal C. Kalutarage, Aaron Dangerfield, Jesus Candelario Mendoza-Gutierrez, Sze Chieh Tan
CPC Classification: H01L21/76831 ({in via holes or trenches, e.g. non-conductive sidewall liners})
Search for rejections for patent application number 20250233015
- Patent Applications
- Applied Materials, Inc.
- CPC H01L21/76831
- Bhaskar Jyoti Bhuyan of San Jose CA US
- Lisa J. Enman of Sunnyvale CA US
- Feng Q. Liu of San Jose CA US
- Jeffrey W. Anthis of Redwood City CA US
- Mark Saly of Santa Clara CA US
- Lakmal C. Kalutarage of San Jose CA US
- Aaron Dangerfield of San Jose CA US
- Jesus Candelario Mendoza-Gutierrez of San Jose CA US
- Sze Chieh Tan of Singapore SG