SEMICONDUCTOR MEMORY DEVICE

Abstract: a semiconductor memory device comprising: circuitry configured to perform control to cause a channel of a first memory string including a first memory cell and a second memory cell connected in series to be in a floating state in which the channel is electrically insulated from a first bit line connected to a first end of the first memory string and a source line connected to a second end of the first memory string while applying a write voltage to a first word line connected to a gate of the first memory cell; and decrease a voltage of a second word line connected to a gate of the second memory cell from a first voltage that is less than the write voltage to a second voltage that is less than the first voltage after placing the channel of the first memory string into the floating state.

Inventor(s): Yuki INUZUKA

CPC Classification: G11C16/102 (Programming or data input circuits)

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