20250231863. Compute-in-memory Circuits Methods Operating S (Taiwan Semiconductor Manufacturing , .)

COMPUTE-IN-MEMORY CIRCUITS AND METHODS FOR OPERATING THE SAME

Abstract: a memory circuit includes a first memory array comprising a plurality of first memory cells, the plurality of first memory cells configured to store a first data element; a second memory array comprising a plurality of second memory cells, the plurality of second memory cells configured to store a second data element; and a control circuit operatively coupled to both of the first memory array and the second memory array, and configured to provide a multiply-accumulate (mac) value at least based on simultaneously multiplying a third data element by the first data element and multiplying the third data element by the second data element.

Inventor(s): Sheng-Chih Lai, Chieh-Fang Chen, Chen-Jun Wu

CPC Classification: G06F12/0223 ({User address space allocation, e.g. contiguous or non contiguous base addressing})

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