MECHANISMS FOR CONTROLLING CO-EXECUTION OF HETEROGENEOUS COOPERATIVE THREAD ARRAYS

Abstract: a multithreaded processor such as a graphics processing unit comprising a scheduler configured with a cooperative thread array type execution policy, the scheduler configured to assign subsets of the cooperative thread arrays for co-execution on particular ones of the processing units based on type identifiers associated with the cooperative thread arrays and the configured policy.

Inventor(s): Neal Clayton Crago, Karthikeyan Sankaralingam, Michael Davies

CPC Classification: G06F9/4881 (Program initiating; Program switching, e.g. by interrupt)

Search for rejections for patent application number 20250231796