SYSTEMS AND METHODS FOR CONFIGURABLE ADDER CIRCUIT

Abstract: a system includes a computation circuit, a memory array operably coupled with the computation circuit, and a controller configured to input a plurality of input data bits to the computation circuit, identify a number of accumulation associated with the plurality of input data bits, based on the number of accumulation, determine whether to enable or disable at least one component of the computation circuit, and based on a determination to enable or disable, generate a control signal to enable or disable the at least one component of the computation circuit.

Inventor(s): Haruki Mori, Hidehiro Fujiwara, Je-Min Hung

CPC Classification: G06F7/501 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models ))

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