DOUBLE-SIDED DEVICE CONTACTS AND THROUGH VIAS FOR PERFORMANCE AND LAYOUT BENEFITS

Abstract: an integrated circuit (ic) device includes transistors between front- and back-side interconnect layers and having source and/or drain regions with front- and back-side contacts. the transistors may be between isolation structures on a same pitch as the transistor gates, sources, and drains. via structures adjacent to the transistors couple between the front- and back-side interconnect layers. the transistors and isolation and via structures may be utilized in various logic cells. transistors having front- and back-side source and/or drain contacts may include vias through or alongside the source and/or drain regions.

Inventor(s): Sanjay Natarajan, Mauro Kobrinsky, Cory Weber, Vishal Tiwari, Shaun Mills, Joseph D’Silva, Ehren Mannebach

CPC Classification: H10D84/83 (No explanation available)

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