20250220991. Integrated Circuit Structure (Intel)
INTEGRATED CIRCUIT STRUCTURE WITH DIRECT BACKSIDE SOURCE OR DRAIN CONTACT
Abstract: integrated circuit structures having direct backside source or drain contacts are described. in an example, an integrated circuit structure includes first, second and third pluralities of horizontally stacked nanowires or fins, and first, second and third gate stacks. a first epitaxial source or drain structure is between the first plurality of horizontally stacked nanowires or fin and the second plurality of horizontally stacked nanowires or fin, the first epitaxial source or drain structure over and electrically coupled to a corresponding conductive backside contact that extends laterally beyond the first epitaxial source or drain structure without contacting the first gate stack or the second gate stack. a second epitaxial source or drain structure is between the second plurality of horizontally stacked nanowires or fin and the third plurality of horizontally stacked nanowires or fin.
Inventor(s): Shao Ming KOH, Conor P. PULS, Mauro J. KOBRINSKY, Giorgio MARIOTTINI, June CHOI, Shawna M. LIFF, Jack T. KAVALIEROS, Sean PURSEL, Dimitri KIOUSSIS, Joseph D’SILVA, Ehren MANNEBACH, Shaun MILLS, Umang DESAI, Makram ABD EL QADER
CPC Classification: H10D62/121 (No explanation available)
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- Patent Applications
- Intel Corporation
- CPC H10D62/121
- Shao Ming KOH of Tigard OR US
- Conor P. PULS of Portland OR US
- Mauro J. KOBRINSKY of Portland OR US
- Giorgio MARIOTTINI of Hillsboro OR US
- June CHOI of Portland OR US
- Shawna M. LIFF of Scottsdale AZ US
- Jack T. KAVALIEROS of Portland OR US
- Sean PURSEL of Tigard OR US
- Dimitri KIOUSSIS of San Jose CA US
- Joseph D’SILVA of Hillsboro OR US
- Ehren MANNEBACH of Beaverton OR US
- Shaun MILLS of Hillsboro OR US
- Umang DESAI of Portland OR US
- Makram ABD EL QADER of Hillsboro OR US