20250220990. Gate Cut Plug Thin Herm (Intel)
GATE CUT PLUG WITH THIN HERMETIC LINER AND LOW-K FILL FOR REDUCED CAPACITANCE AND OXIDATION
Abstract: integrated circuit (ic) device isolation structures between transistor gates. an ic device may include an electrically insulating structure between metal gates of adjacent transistors, and the insulating structure may include a dielectric liner around a different dielectric fill material and on sidewalls of the adjacent metal gates. the dielectric liner may be much thinner than the dielectric fill material. a metal via may be through, and in contact with, the dielectric fill material. the adjacent transistors and metal gates may be between frontside and backside interconnect structures, and the metal via may extend between, and couple, the interconnect structures.
Inventor(s): Swapnadip Ghosh, Yulia Gotlib, Hanbyeol Jeong, Matthew Prince, Andrew Arnold, Sachin Vaidya, Ryan Pearce, Chiao-Ti Huang, Robert Mitchell, Rajaram Pai
CPC Classification: H10D62/118 (No explanation available)
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- Patent Applications
- Intel Corporation
- CPC H10D62/118
- Swapnadip Ghosh of Hillsboro OR US
- Yulia Gotlib of Hillsboro OR US
- Hanbyeol Jeong of Hillsboro OR US
- Matthew Prince of Portland OR US
- Andrew Arnold of Hillsboro OR US
- Sachin Vaidya of Portland OR US
- Ryan Pearce of Beaverton OR US
- Chiao-Ti Huang of Portland OR US
- Robert Mitchell of Portland OR US
- Rajaram Pai of Lake Oswego OR US