SEMICONDUCTOR DEVICES

Abstract: a semiconductor device includes a first chip structure; and a second chip structure on the first chip structure. the first chip structure includes a base substrate, a memory structure on the base substrate, a first substrate on the memory structure, first through-vias penetrating the first substrate, a first wiring structure disposed on the first substrate; first bonding pads on an upper surface of the first wiring structure, and a hydrogen-containing insulating layer disposed in a region adjacent to the memory structure in the first chip structure. the second chip structure includes a second substrate, peripheral circuit transistors and a lower wiring structure disposed on a lower surface of the second substrate; second bonding pads electrically connected to the lower wiring layer, and bonded to the first bonding pads, respectively; and an upper wiring structure.

Inventor(s): Junsoo Kim, Moonyoung Jeong, Sungho Jang, Jinyang Kim, Kiseok Lee

CPC Classification: H10B80/00 (Assemblies of multiple devices comprising at least one memory device covered by this subclass)

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