SILICON PHOTONICS-BASED CHIPLET ACCELERATOR FOR DNN INFERENCE

Abstract: a computer architecture has a global optical waveguide, a buffer having memory space having a memory hierarchy above main memory for temporary data storage. a transmitter transmits a first optical signal with a first plurality of optical wavelengths on the global optical waveguide, and a second optical signal with a second plurality of optical wavelengths on the global optical waveguide. a receiver receives a second optical signal with a third plurality of optical wavelengths from the global optical waveguide. one or more local optical waveguide(s) are coupled to the global optical waveguide to receive all of the first plurality of optical wavelengths and a unique wavelength of the second plurality of optical wavelengths and transmit a unique wavelength of the third plurality of optical wavelengths. a plurality of chiplets are coupled to one of one or more local optical waveguides, each of the plurality of chiplets have a plurality of processing elements each receiving one of the first plurality of optical wavelengths and one of the second plurality of optical wavelengths from the local optical waveguide and transmitting one of the third plurality of optical wavelengths to local optical waveguide.

Inventor(s): Yuan LI, Ahmed LOURI

CPC Classification: H04Q11/0005 ({Switch and router aspects})

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