20250218865. Semiconductor Device Manufacturing Method Ther (Taiwan Semiconductor Manufacturing , .)
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
Abstract: in a method of manufacturing a semiconductor device, a source/drain structure is formed over a substrate, a first interlayer dielectric (ild) layer including one or more dielectric layers is formed over the source/drain structure, a first opening is formed in the first ild layer to at least partially expose the source/drain structure, a sacrificial layer is formed on an inner wall of the first opening, a first insulating layer is formed on the sacrificial layer, a conductive layer is formed on the first insulating layer so as to form a source/drain contact in contact with the source/drain structure, the sacrificial layer is removed to form a space between the first insulating layer and the first ild layer, and a second insulating layer is formed over the source/drain contact and the first ild layer to cap an upper opening the space, thereby forming an air gap.
Inventor(s): Yi-Hua CHENG, Ya-Wen CHIU, Yi Che CHAN, Lun-Kuang TAN
CPC Classification: H01L21/7682 (Applying interconnections to be used for carrying current between separate components within a device {comprising conductors and dielectrics})
Search for rejections for patent application number 20250218865