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20250218479. Device Metho (SAMSUNG ELECTRONICS ., .)

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DEVICE AND METHOD WITH MULTI-BIT OPERATION

Abstract: a multi-bit operation device includes a plurality of multi-bit cells, and a converter configured to convert second sum data into digital data, wherein the second sum data is generated by summing pieces of first sum data output from each of the plurality of multi-bit cells, and each of the plurality of multi-bit cells comprises a memory configured to store a weight resistance corresponding to a multi-bit weight, a current source configured to apply current to the memory such that a weight voltage is generated from the weight resistance, a plurality of multiplexers connected to one another in parallel and connected to the memory in series and each configured to output a signal of one of the weight voltage and a first fixed voltage, based on a multi-bit input, a plurality of capacitors connected respectively to the plurality of multiplexers and each configured to store a separate weight capacitance and generate charge data by performing an operation on the output signal and the weight capacitance, a bit line configured to output first sum data generated by summing pieces of charge data generated by each of the plurality of capacitors, and a switch of which an end is connected to the memory and an opposite end to the end is connected to the bit line.

Inventor(s): Sungmeen MYUNG, Seok Ju YUN, Jaehyuk LEE

CPC Classification: G11C7/1063 (Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers)

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