SOFTWARE DEFINED SUPER CORES

Abstract: techniques for software defined super core usage are described. in some examples, a first and a second processor core are to operate as a single virtual core as configured by the operating system to execute the first set of instruction segments of the single threaded program and the second set of instruction segments of the single threaded program concurrently using a shared memory space, wherein the instruction segments are to include one or more of a store instruction to store live register data to be shared with another core and a load instruction to load live register data shared by another core.

Inventor(s): Jayesh Gaur, Sumeet Bandishte, Anant Nori, Sreenivas Subramoney

CPC Classification: G06F9/544 (Interprogram communication)

Search for rejections for patent application number 20250217211