20250216889. Segment Clock Gat (Advanced Micro Devices, .)
SEGMENT CLOCK GATING
Abstract: the disclosed device includes various circuit blocks and a clock tree for sending a clock signal to the circuit blocks. the clock tree includes various clock drivers. the device also includes a control circuit that power gates, in response to one of the circuit blocks being power gated, a portion of the clock tree that includes one of the clock drivers. various other methods, systems, and computer-readable media are also disclosed.
Inventor(s): Benjamin Tsien, Pravesh Gupta, Madhusudan Chilakam, Jeffrey Lynn Freeman, Indrani Paul, Guhan Krishnan, Ann M. Ling, Chandana Yerneni
CPC Classification: G06F1/10 (Distribution of clock signals {, e.g. skew})
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Categories:
- Patent Applications
- Advanced Micro Devices, Inc.
- CPC G06F1/10
- Benjamin Tsien of Santa Clara CA US
- Pravesh Gupta of Bangalore IN
- Madhusudan Chilakam of Boxborough MA US
- Jeffrey Lynn Freeman of Austin TX US
- Indrani Paul of Austin TX US
- Guhan Krishnan of Boxborough MA US
- Ann M. Ling of Santa Clara CA US
- Chandana Yerneni of Santa Clara CA US