20250196283. Systems Methods (Tokyo Electron Limited)
Appearance
SYSTEMS AND METHODS FOR PANEL POLISHING
Abstract: methods of manufacturing a semiconductor device are disclosed. the method includes providing a polygonal panel with a conductive layer. the method includes polishing an upper surface of the polygonal panel using a chemical polishing process.
Inventor(s): Christopher NETZBAND, Kiyotaka IMAI, Takenao NEMOTO, Tetsuo HIROSE, Ilseok SON
CPC Classification: B24B1/00 (Processes of grinding or polishing; Use of auxiliary equipment in connection with such processes)
Search for rejections for patent application number 20250196283