HARDWARE TAMPERING DETECTION

Abstract: an information handling system may include at least one processor, a plurality of physical sensors, and a firmware having instructions coded thereon that are executable by the at least one processor for: detecting, based on one or more of the physical sensors, a tampering event associated with the information handling system; and transmitting data regarding the tampering event to a central monitoring system.

Inventor(s): Parminder Singh SETHI, Srinath KAPPGAL, Malathi RAMAKRISHNAN, Daniel L. HAMLIN, Praveen KUMAR

CPC Classification: G06F21/86 (Secure or tamper-resistant housings)

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