ACCESS STATE FOR PAGE TABLE ENTRIES

Abstract: an apparatus for address translation is provided in order to translate virtual addresses used by devices in a data processing system into physical addresses for accessing memory. in accordance with the techniques disclosed herein, state tracking circuitry is provided to maintain the state of a page table entry that specifies such address translations. the state can be used to assess whether or not the address translation entry is worth storing in an address translation cache provided for faster access of previously used address translations. accordingly, the techniques disclosed herein allow for more efficient use of the limited capacity available in the address translation cache as well as additional uses of a page table entry's state.

Inventor(s): Jean-Philippe BRUCKER

CPC Classification: G06F12/1063 (Address translation)

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