20250190138. Managing Trim Commands (Micron Technology, .)

MANAGING TRIM COMMANDS IN A MEMORY SUB-SYSTEM

Abstract: disclosed is a system comprising a memory device and a processing device, operatively coupled with the memory device, to perform operations including receiving a memory access command specifying a first range of logical block addresses (lbas). the operations performed by the processing device further include, responsive to determining that a data structure associated with the first range of lbas references a trim command directed to a second range of lbas, blocking the memory access command. the operations performed by the processing device further include, responsive to determining that the second range of lbas references a number of management units (mus) that is less than a predefined maximum number of mus, performing a trim operation on the first range of lbas. the operations performed by the processing device further include, responsive to determining that the data structure indicates a completion of the trim operation, performing a memory access operation specified by the memory access command.

Inventor(s): Yueh-Hung Chen, Fangfang Zhu, Horia Simionescu, Chih-Kuo Kao, Jiangli Zhu

CPC Classification: G06F3/0652 ({Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket})

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